/[gxemul]/trunk/src/cpus/generate_sparc_loadstore.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/cpus/generate_sparc_loadstore.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 28 - (hide annotations)
Mon Oct 8 16:20:26 2007 UTC (13 years, 1 month ago) by dpavlin
File MIME type: text/plain
File size: 4203 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 dpavlin 28 /*
2     * Copyright (C) 2006 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28     * $Id: generate_sparc_loadstore.c,v 1.1 2006/07/02 11:01:20 debug Exp $
29     */
30    
31     #include <stdio.h>
32     #include <string.h>
33    
34    
35     void print_function_name(int use_imm, int store, int size, int signedness)
36     {
37     if (use_imm)
38     printf("i");
39     if (store)
40     printf("s");
41     else {
42     printf("l");
43     if (!signedness)
44     printf("u");
45     }
46     printf("%i", 1 << size);
47     }
48    
49    
50     void loadstore(int mode32, int use_imm, int store, int size, int signedness)
51     {
52     if (store && signedness)
53     return;
54    
55     printf("#if%sdef MODE32\n", mode32? "" : "n");
56    
57     if (use_imm)
58     printf("#define LS_USE_IMM\n");
59    
60     if (store)
61     printf("#define LS_STORE\n");
62     else
63     printf("#define LS_LOAD\n");
64    
65     printf("#define LS_N sparc%s_instr_", mode32? "32" : "");
66     print_function_name(use_imm, store, size, signedness);
67     printf("\n");
68    
69     printf("#define LS_GENERIC_N sparc%s_generic_", mode32? "32" : "");
70     print_function_name(use_imm, store, size, signedness);
71     printf("\n");
72    
73     printf("#define LS_%i\n", 1 << size);
74     printf("#define LS_SIZE %i\n", 1 << size);
75    
76     if (signedness && !store)
77     printf("#define LS_SIGNED\n");
78    
79     printf("#include \"cpu_sparc_instr_loadstore.c\"\n");
80    
81     if (signedness && !store)
82     printf("#undef LS_SIGNED\n");
83    
84     printf("#undef LS_SIZE\n");
85     printf("#undef LS_%i\n", 1 << size);
86    
87     printf("#undef LS_GENERIC_N\n");
88     printf("#undef LS_N\n");
89    
90     if (store)
91     printf("#undef LS_STORE\n");
92     else
93     printf("#undef LS_LOAD\n");
94    
95     if (use_imm)
96     printf("#undef LS_USE_IMM\n");
97    
98     printf("#endif\n");
99     }
100    
101    
102     int main(int argc, char *argv[])
103     {
104     int store, mode32, size, signedness, use_imm;
105    
106     printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n");
107    
108     for (mode32=0; mode32<=1; mode32++)
109     for (use_imm=0; use_imm<=1; use_imm++)
110     for (store=0; store<=1; store++)
111     for (size=0; size<=3; size++)
112     for (signedness=0; signedness<=1; signedness++)
113     loadstore(mode32, use_imm, store, size, signedness);
114    
115     /* Array of pointers to fast load/store functions: */
116     for (mode32=0; mode32<=1; mode32++) {
117     printf("#if%sdef MODE32\n", mode32? "" : "n");
118     printf("\n\nvoid (*sparc%s_loadstore[32])(struct cpu *, struct "
119     "sparc_instr_call *) = {\n", mode32? "32" : "");
120     for (use_imm=0; use_imm<=1; use_imm++)
121     for (store=0; store<=1; store++)
122     for (size=0; size<=3; size++)
123     for (signedness=0; signedness<=1; signedness++) {
124     if (store || size || signedness || use_imm)
125     printf(",\n");
126    
127     if (store && signedness) {
128     printf("\tsparc%s_instr_invalid",
129     mode32? "32" : "");
130     continue;
131     }
132    
133     printf("\tsparc%s_instr_", mode32? "32" : "");
134     print_function_name(use_imm, store,
135     size, signedness);
136     }
137     printf(" };\n");
138     printf("#endif\n");
139     }
140    
141     return 0;
142     }
143    

  ViewVC Help
Powered by ViewVC 1.1.26