/[gxemul]/trunk/src/cpus/generate_ppc_loadstore.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/cpus/generate_ppc_loadstore.c

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Revision 20 - (hide annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 8620 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============
1 dpavlin 14 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 20 * $Id: generate_ppc_loadstore.c,v 1.4 2005/11/23 06:59:52 debug Exp $
29 dpavlin 14 */
30    
31     #include <stdio.h>
32     #include <string.h>
33    
34    
35     char *sizechar[4] = { "b", "h", "w", "d" };
36     char *modes[2] = { "", "32" };
37    
38    
39 dpavlin 20 void do_it(int mode)
40 dpavlin 14 {
41 dpavlin 20 int n, load, size, zero, ignoreofs, update;
42 dpavlin 14
43     n = 0;
44     for (update=0; update<=1; update++)
45     for (ignoreofs=0; ignoreofs<=1; ignoreofs++)
46     for (load=0; load<=1; load++)
47     for (zero=0; zero<=1; zero++)
48     for (size=0; size<4; size++) {
49     if (!zero && !load)
50     continue;
51     if (load && !zero && size == 3)
52     continue;
53    
54     switch (size) {
55     case 0: printf("#define LS_B\n"); break;
56     case 1: printf("#define LS_H\n"); break;
57     case 2: printf("#define LS_W\n"); break;
58     case 3: printf("#define LS_D\n"); break;
59     }
60     printf("#define LS_SIZE %i\n", 1 << size);
61     if (zero)
62     printf("#define LS_ZERO\n");
63     if (load)
64     printf("#define LS_LOAD\n");
65     if (ignoreofs)
66     printf("#define LS_IGNOREOFS\n");
67     if (update)
68     printf("#define LS_UPDATE\n");
69    
70     printf("#define LS_GENERIC_N ppc%s_generic_",
71     modes[mode]);
72     if (load)
73     printf("l");
74     else
75     printf("st");
76     printf("%s", sizechar[size]);
77     if (load) {
78     if (zero)
79     printf("z");
80     else
81     printf("a");
82     }
83     if (update)
84     printf("u");
85     printf("\n");
86    
87     printf("#define LS_N ppc%s_instr_", modes[mode]);
88     if (load)
89     printf("l");
90     else
91     printf("st");
92     printf("%s", sizechar[size]);
93     if (load && size < 3) {
94     if (zero)
95     printf("z");
96     else
97     printf("a");
98     }
99     if (update)
100     printf("u");
101     if (ignoreofs)
102     printf("_0");
103     printf("\n");
104    
105     printf("#include \"cpu_ppc_instr_loadstore.c\"\n");
106    
107     printf("#undef LS_N\n");
108     printf("#undef LS_GENERIC_N\n");
109     switch (size) {
110     case 0: printf("#undef LS_B\n"); break;
111     case 1: printf("#undef LS_H\n"); break;
112     case 2: printf("#undef LS_W\n"); break;
113     case 3: printf("#undef LS_D\n"); break;
114     }
115     printf("#undef LS_SIZE\n");
116     if (load)
117     printf("#undef LS_LOAD\n");
118     if (update)
119     printf("#undef LS_UPDATE\n");
120     if (zero)
121     printf("#undef LS_ZERO\n");
122     if (ignoreofs)
123     printf("#undef LS_IGNOREOFS\n");
124     }
125    
126     /* Indexed loads/stores: */
127     printf("#define LS_INDEXED\n");
128     for (update=0; update<=1; update++)
129     for (load=0; load<=1; load++)
130     for (zero=0; zero<=1; zero++)
131     for (size=0; size<4; size++) {
132     if (!zero && !load)
133     continue;
134     if (load && !zero && size == 3)
135     continue;
136    
137     switch (size) {
138     case 0: printf("#define LS_B\n"); break;
139     case 1: printf("#define LS_H\n"); break;
140     case 2: printf("#define LS_W\n"); break;
141     case 3: printf("#define LS_D\n"); break;
142     }
143     printf("#define LS_SIZE %i\n", 1 << size);
144     if (zero)
145     printf("#define LS_ZERO\n");
146     if (load)
147     printf("#define LS_LOAD\n");
148     if (update)
149     printf("#define LS_UPDATE\n");
150    
151     printf("#define LS_GENERIC_N ppc%s_generic_",
152     modes[mode]);
153     if (load)
154     printf("l");
155     else
156     printf("st");
157     printf("%s", sizechar[size]);
158     if (load) {
159     if (zero)
160     printf("z");
161     else
162     printf("a");
163     }
164     if (update)
165     printf("u");
166     printf("x");
167     printf("\n");
168    
169     printf("#define LS_N ppc%s_instr_", modes[mode]);
170     if (load)
171     printf("l");
172     else
173     printf("st");
174     printf("%s", sizechar[size]);
175     if (load && size < 3) {
176     if (zero)
177     printf("z");
178     else
179     printf("a");
180     }
181     if (update)
182     printf("u");
183     printf("x");
184     printf("\n");
185    
186     printf("#include \"cpu_ppc_instr_loadstore.c\"\n");
187    
188     printf("#undef LS_N\n");
189     printf("#undef LS_GENERIC_N\n");
190     switch (size) {
191     case 0: printf("#undef LS_B\n"); break;
192     case 1: printf("#undef LS_H\n"); break;
193     case 2: printf("#undef LS_W\n"); break;
194     case 3: printf("#undef LS_D\n"); break;
195     }
196     printf("#undef LS_SIZE\n");
197     if (load)
198     printf("#undef LS_LOAD\n");
199     if (update)
200     printf("#undef LS_UPDATE\n");
201     if (zero)
202     printf("#undef LS_ZERO\n");
203     }
204    
205     printf("#undef LS_INDEXED\n");
206    
207    
208     /* Lookup tables for loads/stores: */
209     printf("\n\nvoid (*ppc%s_loadstore[64])(struct cpu *, struct "
210     "ppc_instr_call *) = {\n", modes[mode]);
211     n = 0;
212     for (update=0; update<=1; update++)
213     for (ignoreofs=0; ignoreofs<=1; ignoreofs++)
214     for (load=0; load<=1; load++)
215     for (zero=0; zero<=1; zero++)
216     for (size=0; size<4; size++) {
217     printf("\tppc%s_instr_", modes[mode]);
218    
219 dpavlin 20 if (load && !zero && size == 3) {
220 dpavlin 14 printf("invalid");
221     goto cont;
222     }
223    
224     if (load)
225     printf("l");
226     else
227     printf("st");
228     printf("%s", sizechar[size]);
229     if (load && size < 3) {
230     if (zero)
231     printf("z");
232     else
233     printf("a");
234     }
235     if (update)
236     printf("u");
237     if (ignoreofs)
238     printf("_0");
239     cont:
240     if (++n < 64)
241     printf(",");
242     printf("\n");
243     }
244    
245     printf("};\n\n");
246    
247     printf("\n\nvoid (*ppc%s_loadstore_indexed[32])(struct cpu *, struct "
248     "ppc_instr_call *) = {\n", modes[mode]);
249     n = 0;
250     for (update=0; update<=1; update++)
251     for (load=0; load<=1; load++)
252     for (zero=0; zero<=1; zero++)
253     for (size=0; size<4; size++) {
254     printf("\tppc%s_instr_", modes[mode]);
255    
256 dpavlin 20 if (load && !zero && size == 3) {
257 dpavlin 14 printf("invalid");
258     goto cont_x;
259     }
260    
261     if (load)
262     printf("l");
263     else
264     printf("st");
265     printf("%s", sizechar[size]);
266     if (load && size < 3) {
267     if (zero)
268     printf("z");
269     else
270     printf("a");
271     }
272     if (update)
273     printf("u");
274     printf("x");
275     cont_x:
276     if (++n < 32)
277     printf(",");
278     printf("\n");
279     }
280    
281     printf("};\n\n");
282    
283 dpavlin 20 /* Non-standard loads/stores: */
284     printf("#define LS_BYTEREVERSE\n"
285     "#define LS_INDEXED\n"
286    
287     "#define LS_SIZE 2\n"
288     "#define LS_H\n"
289     "#define LS_GENERIC_N ppc%s_generic_lhbrx\n"
290     "#define LS_N ppc%s_instr_lhbrx\n"
291     "#define LS_LOAD\n"
292     "#include \"cpu_ppc_instr_loadstore.c\"\n"
293     "#undef LS_LOAD\n"
294     "#undef LS_N\n"
295     "#undef LS_GENERIC_N\n"
296     "#define LS_GENERIC_N ppc%s_generic_sthbrx\n"
297     "#define LS_N ppc%s_instr_sthbrx\n"
298     "#include \"cpu_ppc_instr_loadstore.c\"\n"
299     "#undef LS_N\n"
300     "#undef LS_GENERIC_N\n"
301     "#undef LS_H\n"
302     "#undef LS_SIZE\n"
303    
304     "#define LS_SIZE 4\n"
305     "#define LS_W\n"
306     "#define LS_GENERIC_N ppc%s_generic_lwbrx\n"
307     "#define LS_N ppc%s_instr_lwbrx\n"
308     "#define LS_LOAD\n"
309     "#include \"cpu_ppc_instr_loadstore.c\"\n"
310     "#undef LS_LOAD\n"
311     "#undef LS_N\n"
312     "#undef LS_GENERIC_N\n"
313     "#define LS_GENERIC_N ppc%s_generic_stwbrx\n"
314     "#define LS_N ppc%s_instr_stwbrx\n"
315     "#include \"cpu_ppc_instr_loadstore.c\"\n"
316     "#undef LS_N\n"
317     "#undef LS_GENERIC_N\n"
318     "#undef LS_W\n"
319     "#undef LS_SIZE\n"
320    
321     "#undef LS_INDEXED\n"
322     "#undef LS_BYTEREVERSE\n",
323     modes[mode], modes[mode], modes[mode], modes[mode],
324     modes[mode], modes[mode], modes[mode], modes[mode]);
325     }
326    
327     int main(int argc, char *argv[])
328     {
329     int mode;
330    
331     printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n");
332    
333     for (mode = 0; mode <= 1; mode ++) {
334     if (mode == 0)
335     printf("#ifndef MODE32\n");
336     else
337     printf("#ifdef MODE32\n");
338    
339     do_it(mode);
340    
341     printf("#endif\n");
342 dpavlin 14 }
343    
344     return 0;
345     }
346    
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