/[gxemul]/trunk/src/cpus/generate_ppc_loadstore.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/cpus/generate_ppc_loadstore.c

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Revision 14 - (hide annotations)
Mon Oct 8 16:18:51 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 7393 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
20050816	Some success in decoding the way the SGI O2 PROM draws graphics
		during bootup; lines/rectangles and bitmaps work, enough to
		show the bootlogo etc. :-)
		Adding more PPC instructions, and (dummy) BAT registers.
20050817	Updating the pckbc to support scancode type 3 keyboards
		(required in order to interact with the SGI O2 PROM).
		Adding more PPC instructions.
20050818	Adding more ARM instructions; general register forms.
		Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
		CATS machine mode (using SA110 as the default CPU).
		Continuing on general dyntrans related stuff.
20050819	Register forms for ARM load/stores. Gaah! The Compaq C Compiler
		bug is triggered for ARM loads as well, not just PPC :-(
		Adding full support for ARM PC-relative load/stores, and load/
		stores where the PC register is the destination register.
		Adding support for ARM a.out binaries.
20050820	Continuing to add more ARM instructions, and correcting some
		bugs. Continuing on CATS emulation.
		More work on the PPC stuff.
20050821	Minor PPC and ARM updates. Adding more machine types.
20050822	All ARM "data processing instructions" are now generated
		automatically.
20050824	Beginning the work on the ARM system control coprocessor.
		Adding support for ARM halfword load/stores, and signed loads.
20050825	Fixing an important bug related to the ARM condition codes.
		OpenBSD/zaurus and NetBSD/netwinder now print some boot
		messages. :)
		Adding a dummy SH (Hitachi SuperH) cpu family.
		Beginning to add some ARM virtual address translation.
		MIPS bugfixes: unaligned PC now cause an ADEL exception (at
		least for non-bintrans execution), and ADEL/ADES (not
		TLBL/TLBS) are used if userland tries to access kernel space.
		(Thanks to Joshua Wise for making me aware of these bugs.)
20050827	More work on the ARM emulation, and various other updates.
20050828	More ARM updates.
		Finally taking the time to work on translation invalidation
		(i.e. invalidating translated code mappings when memory is
		written to). Hopefully this doesn't break anything.
20050829	Moving CPU related files from src/ to a new subdir, src/cpus/.
		Moving PROM emulation stuff from src/ to src/promemul/.
		Better debug instruction trace for ARM loads and stores.
20050830	Various ARM updates (correcting CMP flag calculation, etc).
20050831	PPC instruction updates. (Flag fixes, etc.)
20050901	Various minor PPC and ARM instruction emulation updates.
		Minor OpenFirmware emulation updates.
20050903	Adding support for adding arbitrary ARM coprocessors (with
		the i80321 I/O coprocessor as a first test).
		Various other ARM and PPC updates.
20050904	Adding some SHcompact disassembly routines.
20050907	(Re)adding a dummy HPPA CPU module, and a dummy i960 module.
20050908	Began hacking on some Apple Partition Table support.
20050909	Adding support for loading Mach-O (Darwin PPC) binaries.
20050910	Fixing an ARM bug (Carry flag was incorrectly updated for some
		data processing instructions); OpenBSD/cats and NetBSD/
		netwinder get quite a bit further now.
		Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
		make them work better when emulating new versions of OpenBSD.
		(Thanks to Alexander Yurchenko for the patches.)
		Also doing some other minor updates to dev_wdc. (Some cleanup,
		and finally converting to devinit, etc.)
20050912	IRIX doesn't have u_int64_t by default (noticed by Andreas
		<avr@gnulinux.nl>); configure updated to reflect this.
		Working on ARM register bank switching, CPSR vs SPSR issues,
		and beginning the work on interrupt/exception support.
20050913	Various minor ARM updates (speeding up load/store multiple,
		and fixing a ROR bug in R(); NetBSD/cats now boots as far as
		OpenBSD/cats).
20050917	Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
20050918	Various minor updates.
20050919	Symbols are now loaded from Mach-O executables.
		Continuing the work on adding ARM exception support.
20050920	More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
		userland! :-)
20050921	Some more progress on ARM interrupt specifics.
20050923	Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
		linesizes/cachesizes for some other VR4xxx.
		Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
		dummy Symphony Labs 83C553 bridge (for Netwinder), usable by 
		dev_footbridge.
20050924	Some PPC progress.
20050925	More PPC progress.
20050926	PPC progress (fixing some bugs etc); Darwin's kernel gets
		slightly further than before.
20050928	Various updates: footbridge/ISA/pciide stuff, and finally
		fixing the VGA text scroll-by-changing-the-base-offset bug.
20050930	Adding a dummy S3 ViRGE pci card for CATS emulation, which
		both NetBSD and OpenBSD detects as VGA.
		Continuing on Footbridge (timers, ISA interrupt stuff).
20051001	Continuing... there are still bugs, probably interrupt-
		related.
20051002	More work on the Footbridge (interrupt stuff).
20051003	Various minor updates. (Trying to find the bug(s).)
20051004	Continuing on the ARM stuff.
20051005	More ARM-related fixes.
20051007	FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
		other was because of an error in the ARM manual (load multiple
		with the S-bit set should _NOT_ load usermode registers, as the
		manual says, but it should load saved registers, which may or
		may not happen to be usermode registers).
		NetBSD/cats and OpenBSD/cats seem to install fine now :-)
		except for a minor bug at the end of the OpenBSD/cats install.
		Updating the documentation, preparing for the next release.
20051008	Continuing with release testing and cleanup.
1 dpavlin 14 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28     * $Id: generate_ppc_loadstore.c,v 1.1 2005/08/29 14:36:41 debug Exp $
29     */
30    
31     #include <stdio.h>
32     #include <string.h>
33    
34    
35     char *sizechar[4] = { "b", "h", "w", "d" };
36     char *modes[2] = { "", "32" };
37    
38    
39     int main(int argc, char *argv[])
40     {
41     int n, load, size, zero, ignoreofs, update, mode;
42    
43     printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n");
44    
45     for (mode = 0; mode <= 1; mode ++) {
46     if (mode == 0)
47     printf("#ifndef MODE32\n");
48     else
49     printf("#ifdef MODE32\n");
50    
51     n = 0;
52     for (update=0; update<=1; update++)
53     for (ignoreofs=0; ignoreofs<=1; ignoreofs++)
54     for (load=0; load<=1; load++)
55     for (zero=0; zero<=1; zero++)
56     for (size=0; size<4; size++) {
57     if (!zero && !load)
58     continue;
59     if (load && !zero && size == 3)
60     continue;
61     if (mode && size == 3)
62     continue;
63    
64     switch (size) {
65     case 0: printf("#define LS_B\n"); break;
66     case 1: printf("#define LS_H\n"); break;
67     case 2: printf("#define LS_W\n"); break;
68     case 3: printf("#define LS_D\n"); break;
69     }
70     printf("#define LS_SIZE %i\n", 1 << size);
71     if (zero)
72     printf("#define LS_ZERO\n");
73     if (load)
74     printf("#define LS_LOAD\n");
75     if (ignoreofs)
76     printf("#define LS_IGNOREOFS\n");
77     if (update)
78     printf("#define LS_UPDATE\n");
79    
80     printf("#define LS_GENERIC_N ppc%s_generic_",
81     modes[mode]);
82     if (load)
83     printf("l");
84     else
85     printf("st");
86     printf("%s", sizechar[size]);
87     if (load) {
88     if (zero)
89     printf("z");
90     else
91     printf("a");
92     }
93     if (update)
94     printf("u");
95     printf("\n");
96    
97     printf("#define LS_N ppc%s_instr_", modes[mode]);
98     if (load)
99     printf("l");
100     else
101     printf("st");
102     printf("%s", sizechar[size]);
103     if (load && size < 3) {
104     if (zero)
105     printf("z");
106     else
107     printf("a");
108     }
109     if (update)
110     printf("u");
111     if (ignoreofs)
112     printf("_0");
113     printf("\n");
114    
115     printf("#include \"cpu_ppc_instr_loadstore.c\"\n");
116    
117     printf("#undef LS_N\n");
118     printf("#undef LS_GENERIC_N\n");
119     switch (size) {
120     case 0: printf("#undef LS_B\n"); break;
121     case 1: printf("#undef LS_H\n"); break;
122     case 2: printf("#undef LS_W\n"); break;
123     case 3: printf("#undef LS_D\n"); break;
124     }
125     printf("#undef LS_SIZE\n");
126     if (load)
127     printf("#undef LS_LOAD\n");
128     if (update)
129     printf("#undef LS_UPDATE\n");
130     if (zero)
131     printf("#undef LS_ZERO\n");
132     if (ignoreofs)
133     printf("#undef LS_IGNOREOFS\n");
134     }
135    
136     /* Indexed loads/stores: */
137     printf("#define LS_INDEXED\n");
138     for (update=0; update<=1; update++)
139     for (load=0; load<=1; load++)
140     for (zero=0; zero<=1; zero++)
141     for (size=0; size<4; size++) {
142     if (!zero && !load)
143     continue;
144     if (load && !zero && size == 3)
145     continue;
146     if (mode && size == 3)
147     continue;
148    
149     switch (size) {
150     case 0: printf("#define LS_B\n"); break;
151     case 1: printf("#define LS_H\n"); break;
152     case 2: printf("#define LS_W\n"); break;
153     case 3: printf("#define LS_D\n"); break;
154     }
155     printf("#define LS_SIZE %i\n", 1 << size);
156     if (zero)
157     printf("#define LS_ZERO\n");
158     if (load)
159     printf("#define LS_LOAD\n");
160     if (update)
161     printf("#define LS_UPDATE\n");
162    
163     printf("#define LS_GENERIC_N ppc%s_generic_",
164     modes[mode]);
165     if (load)
166     printf("l");
167     else
168     printf("st");
169     printf("%s", sizechar[size]);
170     if (load) {
171     if (zero)
172     printf("z");
173     else
174     printf("a");
175     }
176     if (update)
177     printf("u");
178     printf("x");
179     printf("\n");
180    
181     printf("#define LS_N ppc%s_instr_", modes[mode]);
182     if (load)
183     printf("l");
184     else
185     printf("st");
186     printf("%s", sizechar[size]);
187     if (load && size < 3) {
188     if (zero)
189     printf("z");
190     else
191     printf("a");
192     }
193     if (update)
194     printf("u");
195     printf("x");
196     printf("\n");
197    
198     printf("#include \"cpu_ppc_instr_loadstore.c\"\n");
199    
200     printf("#undef LS_N\n");
201     printf("#undef LS_GENERIC_N\n");
202     switch (size) {
203     case 0: printf("#undef LS_B\n"); break;
204     case 1: printf("#undef LS_H\n"); break;
205     case 2: printf("#undef LS_W\n"); break;
206     case 3: printf("#undef LS_D\n"); break;
207     }
208     printf("#undef LS_SIZE\n");
209     if (load)
210     printf("#undef LS_LOAD\n");
211     if (update)
212     printf("#undef LS_UPDATE\n");
213     if (zero)
214     printf("#undef LS_ZERO\n");
215     }
216    
217     printf("#undef LS_INDEXED\n");
218    
219    
220     /* Lookup tables for loads/stores: */
221     printf("\n\nvoid (*ppc%s_loadstore[64])(struct cpu *, struct "
222     "ppc_instr_call *) = {\n", modes[mode]);
223     n = 0;
224     for (update=0; update<=1; update++)
225     for (ignoreofs=0; ignoreofs<=1; ignoreofs++)
226     for (load=0; load<=1; load++)
227     for (zero=0; zero<=1; zero++)
228     for (size=0; size<4; size++) {
229     printf("\tppc%s_instr_", modes[mode]);
230    
231     if ((load && !zero && size == 3)
232     || (mode && size == 3)) {
233     printf("invalid");
234     goto cont;
235     }
236    
237     if (load)
238     printf("l");
239     else
240     printf("st");
241     printf("%s", sizechar[size]);
242     if (load && size < 3) {
243     if (zero)
244     printf("z");
245     else
246     printf("a");
247     }
248     if (update)
249     printf("u");
250     if (ignoreofs)
251     printf("_0");
252     cont:
253     if (++n < 64)
254     printf(",");
255     printf("\n");
256     }
257    
258     printf("};\n\n");
259    
260     printf("\n\nvoid (*ppc%s_loadstore_indexed[32])(struct cpu *, struct "
261     "ppc_instr_call *) = {\n", modes[mode]);
262     n = 0;
263     for (update=0; update<=1; update++)
264     for (load=0; load<=1; load++)
265     for (zero=0; zero<=1; zero++)
266     for (size=0; size<4; size++) {
267     printf("\tppc%s_instr_", modes[mode]);
268    
269     if ((load && !zero && size == 3)
270     || (mode && size == 3)) {
271     printf("invalid");
272     goto cont_x;
273     }
274    
275     if (load)
276     printf("l");
277     else
278     printf("st");
279     printf("%s", sizechar[size]);
280     if (load && size < 3) {
281     if (zero)
282     printf("z");
283     else
284     printf("a");
285     }
286     if (update)
287     printf("u");
288     printf("x");
289     cont_x:
290     if (++n < 32)
291     printf(",");
292     printf("\n");
293     }
294    
295     printf("};\n\n");
296    
297     printf("#endif\n");
298     }
299    
300     return 0;
301     }
302    
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