/[gxemul]/trunk/src/cpus/generate_head.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/cpus/generate_head.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 30 - (hide annotations)
Mon Oct 8 16:20:40 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 5875 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1325 2006/08/15 15:38:37 debug Exp $
20060723	More Transputer instructions (pfix, nfix, opr, mint, ldl, ldlp,
		eqc, rev, ajw, stl, stlf, sthf, sub, ldnl, ldnlp, ldpi, move,
		wcnt, add, bcnt).
		Adding more SPARC instructions (andcc, addcc, bl, rdpr).
		Progress on the igsfb framebuffer used by NetBSD/netwinder.
		Enabling 8-bit fills in dev_fb.
		NetBSD/netwinder 3.0.1 can now run from a disk image :-)
20060724	Cleanup/performance fix for 64-bit virtual translation table
		updates (by removing the "timestamp" stuff). A full NetBSD/pmax
		3.0.1 install for R4400 has dropped from 667 seconds to 584 :)
		Fixing the igsfb "almost vga" color (it is 24-bit, not 18-bit).
		Adding some MIPS instruction combinations (3*lw, and 3*addu).
		The 8048 keyboard now turns off interrupt enable between the
		KBR_ACK and the KBR_RSTDONE, to work better with Linux 2.6.
		Not causing PPC DEC interrupts if PPC_NO_DEC is set for a
		specific CPU; NetBSD/bebox gets slightly further than before.
		Adding some more SPARC instructions: branches, udiv.
20060725	Refreshing dev_pckbc.c a little.
		Cleanups for the SH emulation mode, and adding the first
		"compact" (16-bit) instructions: various simple movs, nop,
		shll, stc, or, ldc.
20060726	Adding dummy "pcn" (AMD PCnet NIC) PCI glue.
20060727	Various cleanups; removing stuff from cpu.h, such as
		running_translated (not really meaningful anymore), and
		page flags (breaking into the debugger clears all translations
		anyway).
		Minor MIPS instruction combination updates.
20060807	Expanding the 3*sw and 3*lw MIPS instruction combinations to
		work with 2* and 4* too, resulting in a minor performance gain.
		Implementing a usleep hack for the RM52xx/MIPS32/MIPS64 "wait"
		instruction (when emulating 1 cpu).
20060808	Experimenting with some more MIPS instruction combinations.
		Implementing support for showing a (hardcoded 12x22) text
		cursor in igsfb.
20060809	Simplifying the NetBSD/evbmips (Malta) install instructions
		somewhat (by using a NetBSD/pmax ramdisk install kernel).
20060812	Experimenting more with the MIPS 'wait' instruction.
		PCI configuration register writes can now be handled, which
		allow PCI IDE controllers to work with NetBSD/Malta 3.0.1 and
		NetBSD/cobalt 3.0.1. (Previously only NetBSD 2.1 worked.)
20060813	Updating dev_gt.c based on numbers from Alec Voropay, to enable
		Linux 2.6 to use PCI on Malta.
		Continuing on Algor interrupt stuff.
20060814	Adding support for routing ISA interrupts to two different
		interrupts, making it possible to run NetBSD/algor :-)
20060814-15	Testing for the release.

==============  RELEASE 0.4.2  ==============


1 dpavlin 14 /*
2 dpavlin 24 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 dpavlin 14 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 30 * $Id: generate_head.c,v 1.23 2006/08/11 17:43:30 debug Exp $
29 dpavlin 14 */
30    
31     #include <stdio.h>
32     #include <stdlib.h>
33     #include <string.h>
34    
35    
36 dpavlin 24 /* NOTE: Static return buffer, so calling it multiple times in the
37     same printf statement with the same argument works :-) but not
38     with different args. Hahaha. Really ugly. */
39 dpavlin 14 char *uppercase(char *l)
40     {
41     static char staticbuf[1000];
42 dpavlin 22 size_t i = 0;
43 dpavlin 14
44     while (*l && i < sizeof(staticbuf)) {
45     char u = *l++;
46     if (u >= 'a' && u <= 'z')
47     u -= 32;
48     staticbuf[i++] = u;
49     }
50     if (i == sizeof(staticbuf))
51     i--;
52     staticbuf[i] = 0;
53     return staticbuf;
54     }
55    
56    
57     int main(int argc, char *argv[])
58     {
59     char *a, *b;
60    
61     if (argc != 3) {
62     fprintf(stderr, "usage: %s arch Arch\n", argv[0]);
63     fprintf(stderr, "Example: %s alpha Alpha\n", argv[0]);
64     fprintf(stderr, " or: %s arm ARM\n", argv[0]);
65     exit(1);
66     }
67    
68     a = argv[1];
69     b = argv[2];
70    
71 dpavlin 24
72 dpavlin 14 printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n");
73    
74 dpavlin 26 printf("#include <assert.h>\n");
75     printf("#include \"debugger.h\"\n");
76    
77 dpavlin 14 printf("#define DYNTRANS_MAX_VPH_TLB_ENTRIES "
78     "%s_MAX_VPH_TLB_ENTRIES\n", uppercase(a));
79     printf("#define DYNTRANS_ARCH %s\n", a);
80     printf("#define DYNTRANS_%s\n", uppercase(a));
81 dpavlin 24
82     /* For 64-bit platforms, arch_L2N, and arch_L3N must be defined. */
83     printf("#ifndef DYNTRANS_32\n");
84     printf("#define DYNTRANS_L2N %s_L2N\n"
85     "#define DYNTRANS_L3N %s_L3N\n"
86     "#if !defined(%s_L2N) || !defined(%s_L3N)\n"
87     "#error arch_L2N, and arch_L3N must be defined for this arch!\n"
88     "#endif\n",
89     uppercase(a), uppercase(a), uppercase(a), uppercase(a));
90     printf("#define DYNTRANS_L2_64_TABLE %s_l2_64_table\n"
91     "#define DYNTRANS_L3_64_TABLE %s_l3_64_table\n", a, a);
92     printf("#endif\n");
93    
94     /* Default pagesize is 4KB. */
95 dpavlin 14 printf("#ifndef DYNTRANS_PAGESIZE\n"
96     "#define DYNTRANS_PAGESIZE 4096\n"
97     "#endif\n");
98 dpavlin 24
99 dpavlin 14 printf("#define DYNTRANS_IC %s_instr_call\n", a);
100     printf("#define DYNTRANS_IC_ENTRIES_PER_PAGE "
101     "%s_IC_ENTRIES_PER_PAGE\n", uppercase(a));
102     printf("#define DYNTRANS_INSTR_ALIGNMENT_SHIFT "
103     "%s_INSTR_ALIGNMENT_SHIFT\n", uppercase(a));
104     printf("#define DYNTRANS_TC_PHYSPAGE %s_tc_physpage\n", a);
105     printf("#define DYNTRANS_INVALIDATE_TLB_ENTRY "
106     "%s_invalidate_tlb_entry\n", a);
107     printf("#define DYNTRANS_ADDR_TO_PAGENR %s_ADDR_TO_PAGENR\n",
108     uppercase(a));
109     printf("#define DYNTRANS_PC_TO_IC_ENTRY %s_PC_TO_IC_ENTRY\n",
110     uppercase(a));
111     printf("#define DYNTRANS_TC_ALLOCATE "
112     "%s_tc_allocate_default_page\n", a);
113     printf("#define DYNTRANS_TC_PHYSPAGE %s_tc_physpage\n", a);
114     printf("#define DYNTRANS_PC_TO_POINTERS %s_pc_to_pointers\n", a);
115     printf("#define DYNTRANS_PC_TO_POINTERS_GENERIC "
116     "%s_pc_to_pointers_generic\n", a);
117     printf("#define COMBINE_INSTRUCTIONS %s_combine_instructions\n", a);
118     printf("#define DISASSEMBLE %s_cpu_disassemble_instr\n", a);
119    
120     printf("\nextern volatile int single_step, single_step_breakpoint;"
121     "\nextern int debugger_n_steps_left_before_interaction;\n"
122     "extern int old_show_trace_tree;\n"
123     "extern int old_instruction_trace;\n"
124     "extern int old_quiet_mode;\n"
125     "extern int quiet_mode;\n");
126    
127     printf("\n/* instr uses the same names as in "
128     "cpu_%s_instr.c */\n#define instr(n) %s_instr_ ## n\n\n", a, a);
129    
130     printf("#ifdef DYNTRANS_DUALMODE_32\n"
131     "#define instr32(n) %s32_instr_ ## n\n\n", a);
132     printf("#endif\n\n");
133    
134     printf("\n#define X(n) void %s_instr_ ## n(struct cpu *cpu, \\\n"
135     " struct %s_instr_call *ic)\n", a, a);
136    
137     printf("\n/*\n * nothing: Do nothing.\n *\n"
138     " * The difference between this function and a \"nop\" "
139     "instruction is that\n * this function does not increase "
140 dpavlin 30 "the program counter. It is used to \"get out\" of running in "
141     "translated\n * mode.\n */\n");
142 dpavlin 14 printf("X(nothing)\n{\n");
143     printf("\tcpu->cd.%s.next_ic --;\n", a);
144     printf("}\n\n");
145    
146 dpavlin 30 /* Ugly special hacks for Transputer and SH[34]: */
147 dpavlin 28 if (strcasecmp(argv[1], "transputer") == 0) {
148     printf("static struct %s_instr_call nothing_call = { "
149     "instr(nothing), {0} };\n", a);
150 dpavlin 30 } else if (strcasecmp(argv[1], "sh") == 0) {
151     printf("static struct %s_instr_call nothing_call = { "
152     "instr(nothing), {0,0} };\n", a);
153 dpavlin 28 } else {
154     printf("static struct %s_instr_call nothing_call = { "
155     "instr(nothing), {0,0,0} };\n", a);
156     }
157 dpavlin 14
158     printf("\n");
159    
160     return 0;
161     }

  ViewVC Help
Powered by ViewVC 1.1.26