/[gxemul]/trunk/src/cpus/generate_arm_r.c
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Annotation of /trunk/src/cpus/generate_arm_r.c

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Revision 20 - (hide annotations)
Mon Oct 8 16:19:23 2007 UTC (13 years, 3 months ago) by dpavlin
File MIME type: text/plain
File size: 9601 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============


1 dpavlin 16 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 20 * $Id: generate_arm_r.c,v 1.4 2005/11/19 18:53:07 debug Exp $
29 dpavlin 16 *
30     * Generate functions for computing "reg" operands.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35    
36    
37     void sync_pc(void)
38     {
39     printf("\tuint32_t tmp, low_pc = ((size_t)ic - (size_t)\n"
40     "\t cpu->cd.arm.cur_ic_page)/sizeof(struct arm_instr_call);\n");
41 dpavlin 20 printf("\ttmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<\n"
42 dpavlin 16 "\t ARM_INSTR_ALIGNMENT_SHIFT);\n");
43     printf("\ttmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 8;\n");
44     }
45    
46    
47     void f(int s, int func, int only_name)
48     {
49     int rm = func & 15;
50     int c = (func >> 7) & 31;
51     int t = (func >> 4) & 7;
52     char name[200];
53     int pc = rm == 15, rc = c >> 1;
54    
55     snprintf(name, sizeof(name), "arm_r%s_r%i_t%i_c%i", s? "s" : "",
56     rm, t, c);
57     if (only_name) {
58     printf("%s", name);
59     return;
60     }
61    
62     printf("uint32_t %s(struct cpu *cpu, struct arm_instr_call *ic)"
63     " {\n", name);
64     if (pc)
65     sync_pc();
66    
67     switch (t) {
68    
69     case 0: /* lsl c (Logical Shift Left by constant) */
70     if (s) {
71     printf("{ uint32_t x = ");
72     if (pc)
73     printf("tmp");
74     else
75     printf("cpu->cd.arm.r[%i]", rm);
76     printf(";\n");
77     if (c != 0) {
78 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
79 dpavlin 16 printf("if (x & 0x%x)\n"
80 dpavlin 20 "\tcpu->cd.arm.flags |= ARM_F_C;\n",
81 dpavlin 16 (int)(0x80000000 >> (c-1)));
82     printf("x <<= %i;\n", c);
83     }
84     printf(" return x; }\n");
85     } else {
86     if (pc)
87     printf("\treturn tmp");
88     else
89     printf("\treturn cpu->cd.arm.r[%i]", rm);
90     if (c != 0)
91     printf(" << %i", c);
92     printf(";\n");
93     }
94     break;
95    
96     case 1: /* lsl Rc (Logical Shift Left by register) */
97     if (s) {
98     printf("{ uint32_t x = ");
99     if (pc)
100     printf("tmp");
101     else
102     printf("cpu->cd.arm.r[%i]", rm);
103     printf(";\n");
104     printf(" uint32_t y = cpu->cd.arm.r[%i] & 255;\n", rc);
105     printf(" if (y != 0) {\n");
106 dpavlin 20 printf(" cpu->cd.arm.flags &= ~ARM_F_C;\n");
107 dpavlin 16 printf(" if (y >= 32) return 0;\n");
108     printf(" x <<= (y - 1);\n");
109     printf(" if (x & 0x80000000)\n"
110 dpavlin 20 "\tcpu->cd.arm.flags |= ARM_F_C;\n");
111 dpavlin 16 printf(" x <<= 1;\n");
112     printf(" }\n");
113     printf(" return x; }\n");
114     } else {
115     printf("{ uint32_t y = cpu->cd.arm.r[%i] & 255;\n", rc);
116     printf(" uint32_t x =");
117     if (pc)
118     printf("tmp");
119     else
120     printf("cpu->cd.arm.r[%i]", rm);
121     printf(";\n");
122     printf("if (y > 31) return 0; else x <<= y;\n");
123     printf("return x; }\n");
124     }
125     break;
126    
127     case 2: /* lsr c (Logical Shift Right by constant) */
128     /* 1..32 */
129     if (s) {
130     printf("{ uint32_t x = ");
131     if (pc)
132     printf("tmp");
133     else
134     printf("cpu->cd.arm.r[%i]", rm);
135     printf(";\n");
136     if (c == 0)
137     c = 32;
138 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
139 dpavlin 16 printf("if (x & 0x%x)\n"
140 dpavlin 20 "\tcpu->cd.arm.flags |= ARM_F_C;\n",
141 dpavlin 16 (int)(1 << (c-1)));
142     if (c == 32)
143     printf("x = 0;\n");
144     else
145     printf("x >>= %i;\n", c);
146     printf(" return x; }\n");
147     } else {
148     if (c == 0)
149     printf("\treturn 0;\n");
150     else {
151     if (pc)
152     printf("\treturn tmp");
153     else
154     printf("\treturn cpu->cd.arm.r[%i]",rm);
155     printf(" >> %i;\n", c);
156     }
157     }
158     break;
159    
160     case 3: /* lsr Rc (Logical Shift Right by register) */
161     if (s) {
162     printf("{ uint32_t x = ");
163     if (pc)
164     printf("tmp");
165     else
166     printf("cpu->cd.arm.r[%i]", rm);
167     printf(",y=cpu->cd.arm.r[%i]&255;\n", rc);
168     printf("if(y==0) return x;\n");
169 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
170 dpavlin 16 printf("if(y>31) y=32;\n");
171     printf("y--; x >>= y;\n");
172     printf("if (x & 1) "
173 dpavlin 20 "cpu->cd.arm.flags |= ARM_F_C;\n");
174 dpavlin 16 printf(" return x >> 1; }\n");
175     } else {
176     printf("{ uint32_t y=cpu->cd.arm.r[%i]&255;\n", rc);
177     printf("uint32_t x=");
178     if (pc)
179     printf("tmp");
180     else
181     printf("cpu->cd.arm.r[%i]",rm);
182     printf("; ");
183     printf("if (y>=32) return 0;\n");
184     printf("return x >> y; } ");
185     }
186     break;
187    
188     case 4: /* asr c (Arithmetic Shift Right by constant) */
189     /* 1..32 */
190     if (s) {
191     printf("{ int32_t x = ");
192     if (pc)
193     printf("tmp");
194     else
195     printf("cpu->cd.arm.r[%i]", rm);
196     printf(";\n");
197     if (c == 0)
198     c = 32;
199 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
200 dpavlin 16 printf("if (x & 0x%x)\n"
201 dpavlin 20 "\tcpu->cd.arm.flags |= ARM_F_C;\n",
202 dpavlin 16 (int)(1 << (c-1)));
203     if (c == 32)
204     printf("x = (x<0)? 0xffffffff : 0;\n");
205     else
206     printf("x >>= %i;\n", c);
207     printf(" return x; }\n");
208     } else {
209     if (c == 0) {
210     printf("\treturn ");
211     if (pc)
212     printf("tmp");
213     else
214     printf("cpu->cd.arm.r[%i]",rm);
215     printf(" & 0x80000000? 0xffffffff : 0;\n");
216     } else {
217     printf("return (int32_t)");
218     if (pc)
219     printf("tmp");
220     else
221     printf("cpu->cd.arm.r[%i]",rm);
222     printf(" >> %i;\n", c);
223     }
224     }
225     break;
226    
227     case 5: /* asr Rc (Arithmetic Shift Right by register) */
228     if (s) {
229     printf("{ int32_t x = ");
230     if (pc)
231     printf("tmp");
232     else
233     printf("cpu->cd.arm.r[%i]", rm);
234     printf(",y=cpu->cd.arm.r[%i]&255;\n", rc);
235     printf("if(y==0) return x;\n");
236 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
237 dpavlin 16 printf("if(y>31) y=31;\n");
238     printf("y--; x >>= y;\n");
239     printf("if (x & 1) "
240 dpavlin 20 "cpu->cd.arm.flags |= ARM_F_C;\n");
241 dpavlin 16 printf(" return (int32_t)x >> 1; }\n");
242     } else {
243     printf("{ int32_t y=cpu->cd.arm.r[%i]&255;\n", rc);
244     printf("int32_t x=");
245     if (pc)
246     printf("tmp");
247     else
248     printf("cpu->cd.arm.r[%i]",rm);
249     printf("; ");
250     printf("if (y>=31) return (x<0)?0xffffffff:0;\n");
251     printf("return (int32_t)x >> y; } ");
252     }
253     break;
254    
255     case 6: /* ror c OR rrx (Arithmetic Shift Right by constant) */
256     /* 0=rrx, 1..31=ror */
257     if (c == 0) {
258     printf("\tprintf(\"%s\\n\");\n", name);
259     printf("\texit(1); /* TODO */\n\treturn 0;\n");
260     } else if (s) {
261     printf("{ uint64_t x = ");
262     if (pc)
263     printf("tmp");
264     else
265     printf("cpu->cd.arm.r[%i]", rm);
266     printf("; x |= (x << 32);\n");
267 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
268 dpavlin 16 printf("if (x & 0x%x)\n"
269 dpavlin 20 "\tcpu->cd.arm.flags |= ARM_F_C;\n",
270 dpavlin 16 (int)(1 << (c-1)));
271     printf(" return x >> %i; }\n", c);
272     } else {
273 dpavlin 18 printf("{ uint64_t x=");
274 dpavlin 16 if (pc)
275     printf("tmp");
276     else
277     printf("cpu->cd.arm.r[%i]",rm);
278     printf("; x |= (x << 32); ");
279 dpavlin 18 printf("return x >> %i; }\n", c);
280 dpavlin 16 }
281     break;
282    
283     case 7: /* ror Rc (Rotate Right by register) */
284     if (s) {
285     printf("{ uint64_t x = ");
286     if (pc)
287     printf("tmp");
288     else
289     printf("cpu->cd.arm.r[%i]", rm);
290     printf("; int y=cpu->cd.arm.r[%i]&255;\n", rc);
291     printf("if(y==0) return x;\n");
292     printf("y --; y &= 31; x >>= y;\n");
293 dpavlin 20 printf("cpu->cd.arm.flags &= ~ARM_F_C;\n");
294 dpavlin 16 printf("if (x & 1) "
295 dpavlin 20 "cpu->cd.arm.flags |= ARM_F_C;\n");
296 dpavlin 16 printf(" return x >> 1; }\n");
297     } else {
298     printf("{ int y=cpu->cd.arm.r[%i]&31;\n", rc);
299     printf("uint64_t x=");
300     if (pc)
301     printf("tmp");
302     else
303     printf("cpu->cd.arm.r[%i]",rm);
304     printf("; x |= (x << 32); ");
305     printf("return (x >> y); } ");
306     }
307     break;
308    
309     default:
310     printf("\tprintf(\"%s\\n\");\n", name);
311     printf("\texit(1); /* TODO */\n\treturn 0;\n");
312     }
313    
314     printf("}\n");
315     }
316    
317    
318     int main(int argc, char *argv[])
319     {
320     int s, func, f_start, f_end;
321    
322     if (argc < 3) {
323     fprintf(stderr, "usage: %s start end\n", argv[0]);
324     exit(1);
325     }
326    
327     f_start = strtol(argv[1], NULL, 0);
328     f_end = strtol(argv[2], NULL, 0);
329    
330     printf("/*\n * DO NOT EDIT! AUTOMATICALLY GENERATED!\n */\n\n");
331     printf("#include <stdio.h>\n");
332     printf("#include <stdlib.h>\n");
333     printf("#include \"cpu.h\"\n");
334     printf("#include \"misc.h\"\n");
335     printf("\n\n");
336    
337     if (f_start != 0 || f_end != 0) {
338     for (s=0; s<=1; s++)
339     for (func=f_start; func<=f_end; func++)
340     f(s, func, 0);
341     } else {
342     for (s=0; s<=1; s++)
343     for (func=0; func<=0xfff; func++) {
344     printf("extern uint32_t ");
345     f(s, func, 1);
346     printf("(struct cpu *, struct arm_"
347     "instr_call *);\n");
348     }
349    
350     printf("\nuint32_t (*arm_r[8192])(struct cpu *,"
351     " struct arm_instr_call *) = {\n");
352     for (s=0; s<=1; s++)
353     for (func=0; func<=0xfff; func++) {
354     printf("\t");
355     f(s, func, 1);
356     if (s!=1 || func!=0xfff)
357     printf(",");
358     printf("\n");
359     }
360     printf("};\n\n");
361     }
362    
363     return 0;
364     }
365    

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