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/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: generate_arm_multi.c,v 1.11 2005/11/19 18:53:07 debug Exp $ |
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* |
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* Generation of commonly used ARM load/store multiple instructions. |
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* |
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* The main idea is to first check whether a load/store would be possible |
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* without going outside a page, and if so, use the host_load or _store |
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* arrays for quick access to emulated RAM. Otherwise, fall back to using |
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* the generic bdt_load() or bdt_store(). |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include "misc.h" |
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|
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|
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/* |
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* generate_opcode(): |
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* |
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* Given an ARM load/store multiple opcode, produce equivalent "hardcoded" |
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* C code which emulates the opcode. |
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* |
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* TODO: |
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* |
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* o) On 64-bit hosts, load/store two registers at a time. This |
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* feature depends both on the alignment of the base register, |
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* and the specific set of registers being loaded/stored. |
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* |
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* o) Alignment checks. (Optional?) |
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* |
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* o) For accesses that cross page boundaries, use two pages using |
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* the fast method instead of calling the generic function? |
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*/ |
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void generate_opcode(uint32_t opcode) |
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{ |
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int p, u, s, w, load, r, n_regs, i, x; |
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|
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if ((opcode & 0x0e000000) != 0x08000000) { |
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fprintf(stderr, "opcode 0x%08x is not an ldm/stm\n", opcode); |
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exit(1); |
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} |
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|
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r = (opcode >> 16) & 15; |
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p = opcode & 0x01000000? 1 : 0; |
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u = opcode & 0x00800000? 1 : 0; |
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s = opcode & 0x00400000? 1 : 0; |
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w = opcode & 0x00200000? 1 : 0; |
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load = opcode & 0x00100000? 1 : 0; |
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n_regs = 0; |
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for (i=0; i<16; i++) |
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if (opcode & (1 << i)) |
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n_regs ++; |
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|
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/* TODO: Check for register pairs, for 64-bit load/stores */ |
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|
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if (n_regs == 0) { |
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fprintf(stderr, "opcode 0x%08x has no registers set\n", opcode); |
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exit(1); |
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} |
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|
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if (s) { |
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fprintf(stderr, "opcode 0x%08x has s-bit set\n", opcode); |
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exit(1); |
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} |
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|
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if (r == 15) { |
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fprintf(stderr, "opcode 0x%08x has r=15\n", opcode); |
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exit(1); |
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} |
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|
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printf("\nvoid arm_instr_multi_0x%08x(struct cpu *cpu," |
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" struct arm_instr_call *ic) {\n", opcode); |
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|
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printf("\tunsigned char *page;\n"); |
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printf("\tuint32_t addr = cpu->cd.arm.r[%i];\n", r); |
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|
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if (!load && opcode & 0x8000) { |
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printf("\tuint32_t tmp_pc = ((size_t)ic - (size_t)\n\t" |
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" cpu->cd.arm.cur_ic_page) / sizeof(struct " |
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"arm_instr_call);\n" |
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"\ttmp_pc = ((cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1)" |
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"\n\t << ARM_INSTR_ALIGNMENT_SHIFT)))\n" |
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"\t + (tmp_pc << ARM_INSTR_ALIGNMENT_SHIFT) + 12;\n"); |
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} |
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|
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if (p) |
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printf("\taddr %s 4;\n", u? "+=" : "-="); |
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|
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printf("\tpage = cpu->cd.arm.host_%s[addr >> 12];\n", |
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load? "load" : "store"); |
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|
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printf("\taddr &= 0xffc;\n"); |
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|
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printf("\tif ("); |
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switch (p*2 + u) { |
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case 0: /* post-decrement */ |
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if (n_regs > 1) |
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printf("addr >= 0x%x && ", 4*(n_regs-1)); |
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break; |
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case 1: /* post-increment */ |
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if (n_regs > 1) |
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printf("addr <= 0x%x && ", 0x1000 - 4*n_regs); |
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break; |
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case 2: /* pre-decrement */ |
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if (n_regs > 1) |
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printf("addr >= 0x%x && ", 4*(n_regs-1)); |
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break; |
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case 3: /* pre-increment */ |
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if (n_regs > 1) |
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printf("addr <= 0x%x && ", 0x1000 - 4*n_regs); |
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break; |
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} |
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printf("page != NULL) {\n"); |
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|
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printf("\t\tuint32_t *p = (uint32_t *) (page + addr);\n"); |
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|
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if (u) { |
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x = 0; |
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for (i=0; i<=15; i++) { |
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if (!(opcode & (1 << i))) |
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continue; |
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|
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if (load && w && i == r) { |
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/* Skip the load if we're using writeback. */ |
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} else if (load) { |
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if (i == 15) |
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printf("\t\tcpu->pc = p[%i];\n", x); |
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else |
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printf("\t\tcpu->cd.arm.r[%i] = " |
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"p[%i];\n", i, x); |
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} else { |
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if (i == 15) |
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printf("\t\tp[%i] = tmp_pc;\n", x); |
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else |
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printf("\t\tp[%i] = cpu->cd.arm.r" |
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"[%i];\n", x, i); |
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} |
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|
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x ++; |
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} |
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} else { |
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/* Decrementing, but do it incrementing anyway: */ |
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x = -n_regs; |
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for (i=0; i<=15; i++) { |
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if (!(opcode & (1 << i))) |
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continue; |
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|
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x ++; |
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|
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if (load && w && i == r) { |
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/* Skip the load if we're using writeback. */ |
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} else if (load) { |
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if (i == 15) |
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printf("\t\tcpu->pc = p[%i];\n", x); |
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else |
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printf("\t\tcpu->cd.arm.r[%i] = " |
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"p[%i];\n", i, x); |
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} else { |
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if (i == 15) |
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printf("\t\tp[%i] = tmp_pc;\n", x); |
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else |
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printf("\t\tp[%i] = " |
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"cpu->cd.arm.r[%i];\n", x, i); |
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} |
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} |
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} |
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|
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if (w) |
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printf("\t\tcpu->cd.arm.r[%i] %s %i;\n", |
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r, u? "+=" : "-=", 4*n_regs); |
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|
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if (load && opcode & 0x8000) { |
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printf("\t\tquick_pc_to_pointers(cpu);\n"); |
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} |
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|
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printf("\t} else\n"); |
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printf("\t\tinstr(bdt_%s)(cpu, ic);\n", load? "load" : "store"); |
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|
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printf("}\nY(multi_0x%08x)\n", opcode); |
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} |
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|
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|
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/* |
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* main(): |
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* |
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* Normal ARM code seems to only use about a few hundred of the 1^24 possible |
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* load/store multiple instructions. (I'm not counting the s-bit now.) |
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* Instead of having a linear array of 100s of entries, we can select a list |
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* to scan based on a few bits (*), and those lists will be shorter. |
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* |
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* (*) By running experiment_arm_multi.c on statistics gathered from running |
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* NetBSD/cats, it seems that choosing the following 8 bits results in |
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* the shortest linear lists: |
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* |
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* xxxx100P USWLnnnn llllllll llllllll |
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* ^ ^ ^ ^ ^ ^ ^ ^ (0x00950154) |
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*/ |
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int main(int argc, char *argv[]) |
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{ |
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int i, j; |
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int n_used[256]; |
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|
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if (argc < 2) { |
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fprintf(stderr, "usage: %s opcode [..]\n", argv[0]); |
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exit(1); |
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} |
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|
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printf("\n/* AUTOMATICALLY GENERATED! Do not edit. */\n\n" |
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"#include <stdio.h>\n" |
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"#include <stdlib.h>\n" |
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"#include \"cpu.h\"\n" |
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"#include \"misc.h\"\n" |
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"#include \"arm_quick_pc_to_pointers.h\"\n" |
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"#include \"arm_tmphead_1.h\"\n" |
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"\n#define instr(x) arm_instr_ ## x\n"); |
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printf("extern void arm_instr_nop(struct cpu *, " |
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"struct arm_instr_call *);\n"); |
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printf("extern void arm_instr_bdt_load(struct cpu *, " |
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"struct arm_instr_call *);\n"); |
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printf("extern void arm_instr_bdt_store(struct cpu *, " |
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"struct arm_instr_call *);\n"); |
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printf("\n\n"); |
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|
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/* Generate the opcode functions: */ |
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for (i=1; i<argc; i++) |
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generate_opcode(strtol(argv[i], NULL, 0)); |
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|
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/* Generate 256 small lookup tables: */ |
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for (j=0; j<256; j++) { |
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int n = 0, zz, zz0; |
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for (i=1; i<argc; i++) { |
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zz = strtol(argv[i], NULL, 0); |
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zz = ((zz & 0x00800000) >> 16) |
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|((zz & 0x00100000) >> 14) |
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|((zz & 0x00040000) >> 13) |
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|((zz & 0x00010000) >> 12) |
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|((zz & 0x00000100) >> 5) |
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|((zz & 0x00000040) >> 4) |
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|((zz & 0x00000010) >> 3) |
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|((zz & 0x00000004) >> 2); |
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if (zz == j) |
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n++; |
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} |
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printf("\nuint32_t multi_opcode_%i[%i] = {\n", j, n+1); |
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for (i=1; i<argc; i++) { |
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zz = zz0 = strtol(argv[i], NULL, 0); |
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zz = ((zz & 0x00800000) >> 16) |
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|((zz & 0x00100000) >> 14) |
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|((zz & 0x00040000) >> 13) |
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|((zz & 0x00010000) >> 12) |
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|((zz & 0x00000100) >> 5) |
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|((zz & 0x00000040) >> 4) |
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|((zz & 0x00000010) >> 3) |
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|((zz & 0x00000004) >> 2); |
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if (zz == j) |
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printf("\t0x%08x,\n", zz0); |
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} |
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printf("0 };\n"); |
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} |
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|
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/* Generate 256 tables with function pointers: */ |
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for (j=0; j<256; j++) { |
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int n = 0, zz, zz0; |
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for (i=1; i<argc; i++) { |
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zz = strtol(argv[i], NULL, 0); |
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zz = ((zz & 0x00800000) >> 16) |
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|((zz & 0x00100000) >> 14) |
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|((zz & 0x00040000) >> 13) |
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|((zz & 0x00010000) >> 12) |
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|((zz & 0x00000100) >> 5) |
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|((zz & 0x00000040) >> 4) |
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|((zz & 0x00000010) >> 3) |
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|((zz & 0x00000004) >> 2); |
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if (zz == j) |
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n++; |
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} |
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n_used[j] = n; |
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if (n == 0) |
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continue; |
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printf("void (*multi_opcode_f_%i[%i])(struct cpu *," |
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" struct arm_instr_call *) = {\n", j, n*16); |
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for (i=1; i<argc; i++) { |
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zz = zz0 = strtol(argv[i], NULL, 0); |
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zz = ((zz & 0x00800000) >> 16) |
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|((zz & 0x00100000) >> 14) |
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|((zz & 0x00040000) >> 13) |
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|((zz & 0x00010000) >> 12) |
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|((zz & 0x00000100) >> 5) |
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|((zz & 0x00000040) >> 4) |
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|((zz & 0x00000010) >> 3) |
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|((zz & 0x00000004) >> 2); |
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if (zz == j) { |
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printf("\tarm_instr_multi_0x%08x__eq,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__ne,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__cs,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__cc,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__mi,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__pl,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__vs,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__vc,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__hi,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__ls,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__ge,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__lt,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__gt,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x__le,\n", zz0); |
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printf("\tarm_instr_multi_0x%08x,\n", zz0); |
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printf("\tarm_instr_nop,\n"); |
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} |
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} |
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printf("};\n"); |
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} |
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|
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|
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printf("\nuint32_t *multi_opcode[256] = {\n"); |
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for (i=0; i<256; i++) { |
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printf(" multi_opcode_%i,", i); |
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if ((i % 4) == 0) |
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printf("\n"); |
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} |
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printf("};\n"); |
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|
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printf("\nvoid (**multi_opcode_f[256])(struct cpu *," |
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" struct arm_instr_call *) = {\n"); |
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for (i=0; i<256; i++) { |
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if (n_used[i] > 0) |
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printf(" multi_opcode_f_%i,", i); |
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else |
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printf(" NULL,"); |
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if ((i % 4) == 0) |
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printf("\n"); |
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} |
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printf("};\n"); |
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|
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return 0; |
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} |
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