/[gxemul]/trunk/src/cpus/cpu_x86_instr.c
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revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_x86_instr.c,v 1.1 2005/08/29 14:36:41 debug Exp $   *  $Id: cpu_x86_instr.c,v 1.5 2006/02/09 22:55:20 debug Exp $
29   *   *
30   *  x86/amd64 instructions.   *  x86/amd64 instructions.
31   *   *
32   *  Individual functions should keep track of cpu->n_translated_instrs. Since   *  Individual functions should keep track of cpu->n_translated_instrs.
  *  x86 uses variable length instructions, cpu->cd.x86.next_ic must also be  
  *  increased by the number of "instruction slots" that were executed. (I.e.  
  *  if an instruction occupying 5 bytes was executed, then next_ic should be  
  *  increased by 5.)  
  *  
33   *  (n_translated_instrs is automatically increased by 1 for each function   *  (n_translated_instrs is automatically increased by 1 for each function
34   *  call. If no instruction was executed, then it should be decreased. If, say,   *  call. If no instruction was executed, then it should be decreased. If, say,
35   *  4 instructions were combined into one function and executed, then it should   *  4 instructions were combined into one function and executed, then it should
# Line 47  Line 42 
42   */   */
43  X(nop)  X(nop)
44  {  {
         cpu->cd.x86.next_ic ++;  
45  }  }
46    
47    
# Line 72  X(end_of_page) Line 66  X(end_of_page)
66    
67    
68  /*  /*
  *  x86_combine_instructions():  
  *  
  *  Combine two or more instructions, if possible, into a single function call.  
  */  
 void COMBINE_INSTRUCTIONS(struct cpu *cpu, struct x86_instr_call *ic,  
         uint64_t addr)  
 {  
         int n_back;  
         n_back = addr & (X86_IC_ENTRIES_PER_PAGE-1);  
   
         if (n_back >= 1) {  
                 /*  TODO  */  
         }  
   
         /*  TODO: Combine forward as well  */  
 }  
   
   
 /*****************************************************************************/  
   
   
 /*  
69   *  x86_instr_to_be_translated():   *  x86_instr_to_be_translated():
70   *   *
71   *  Translate an instruction word into an x86_instr_call. ic is filled in with   *  Translate an instruction word into an x86_instr_call. ic is filled in with
# Line 104  void COMBINE_INSTRUCTIONS(struct cpu *cp Line 76  void COMBINE_INSTRUCTIONS(struct cpu *cp
76  X(to_be_translated)  X(to_be_translated)
77  {  {
78          uint64_t addr, low_pc;          uint64_t addr, low_pc;
79    #ifdef DYNTRANS_BACKEND
80            int simple = 0;
81    #endif
82          unsigned char *page;          unsigned char *page;
83          int main_opcode;          int main_opcode;
84          unsigned char ib[17];          unsigned char ib[17];
85          void (*samepage_function)(struct cpu *, struct x86_instr_call *);          /* void (*samepage_function)(struct cpu *, struct x86_instr_call *); */
86    
87          /*  Figure out the (virtual) address of the instruction:  */          /*  Figure out the (virtual) address of the instruction:  */
88          low_pc = ((size_t)ic - (size_t)cpu->cd.x86.cur_ic_page)          low_pc = ((size_t)ic - (size_t)cpu->cd.x86.cur_ic_page)
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