25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_x86.c,v 1.3 2005/09/30 14:17:03 debug Exp $ |
* $Id: cpu_x86.c,v 1.5 2005/11/13 00:14:07 debug Exp $ |
29 |
* |
* |
30 |
* x86 (and amd64) CPU emulation. |
* x86 (and amd64) CPU emulation. |
31 |
* |
* |
95 |
|
|
96 |
cpu->cd.x86.model = models[i]; |
cpu->cd.x86.model = models[i]; |
97 |
|
|
98 |
|
cpu->translate_address = x86_translate_address; |
99 |
|
|
100 |
/* Initial startup is in 16-bit real mode: */ |
/* Initial startup is in 16-bit real mode: */ |
101 |
cpu->pc = 0xfff0; |
cpu->pc = 0xfff0; |
102 |
|
|
111 |
cpu->cd.x86.descr_cache[X86_S_CS].writable = 1; |
cpu->cd.x86.descr_cache[X86_S_CS].writable = 1; |
112 |
cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0; |
cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0; |
113 |
cpu->cd.x86.s[X86_S_CS] = 0xf000; |
cpu->cd.x86.s[X86_S_CS] = 0xf000; |
114 |
|
cpu->cd.x86.cursegment = X86_S_CS; |
115 |
|
|
116 |
cpu->cd.x86.idtr = 0; |
cpu->cd.x86.idtr = 0; |
117 |
cpu->cd.x86.idtr_limit = 0x3ff; |
cpu->cd.x86.idtr_limit = 0x3ff; |
118 |
|
|
|
cpu->translate_address = x86_translate_address; |
|
|
|
|
119 |
cpu->cd.x86.rflags = 0x0002; |
cpu->cd.x86.rflags = 0x0002; |
120 |
if (cpu->cd.x86.model.model_number == X86_MODEL_8086) |
if (cpu->cd.x86.model.model_number == X86_MODEL_8086) |
121 |
cpu->cd.x86.rflags |= 0xf000; |
cpu->cd.x86.rflags |= 0xf000; |
122 |
|
|
123 |
|
cpu->is_32bit = (cpu->cd.x86.model.model_number < X86_MODEL_AMD64)? |
124 |
|
1 : 0; |
125 |
|
|
126 |
|
if (cpu->is_32bit) { |
127 |
|
cpu->update_translation_table = x8632_update_translation_table; |
128 |
|
cpu->invalidate_translation_caches = |
129 |
|
x8632_invalidate_translation_caches; |
130 |
|
cpu->invalidate_code_translation = |
131 |
|
x8632_invalidate_code_translation; |
132 |
|
} else { |
133 |
|
cpu->update_translation_table = x86_update_translation_table; |
134 |
|
cpu->invalidate_translation_caches = |
135 |
|
x86_invalidate_translation_caches; |
136 |
|
cpu->invalidate_code_translation = |
137 |
|
x86_invalidate_code_translation; |
138 |
|
} |
139 |
|
|
140 |
/* Only show name and caches etc for CPU nr 0 (in SMP machines): */ |
/* Only show name and caches etc for CPU nr 0 (in SMP machines): */ |
141 |
if (cpu_id == 0) { |
if (cpu_id == 0) { |
142 |
debug("%s", cpu->name); |
debug("%s", cpu->name); |
461 |
} |
} |
462 |
|
|
463 |
|
|
|
/* |
|
|
* x86_cpu_show_full_statistics(): |
|
|
* |
|
|
* Show detailed statistics on opcode usage on each cpu. |
|
|
*/ |
|
|
void x86_cpu_show_full_statistics(struct machine *m) |
|
|
{ |
|
|
fatal("x86_cpu_show_full_statistics(): TODO\n"); |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* x86_cpu_tlbdump(): |
|
|
* |
|
|
* Called from the debugger to dump the TLB in a readable format. |
|
|
* x is the cpu number to dump, or -1 to dump all CPUs. |
|
|
* |
|
|
* If rawflag is nonzero, then the TLB contents isn't formated nicely, |
|
|
* just dumped. |
|
|
*/ |
|
|
void x86_cpu_tlbdump(struct machine *m, int x, int rawflag) |
|
|
{ |
|
|
fatal("ppc_cpu_tlbdump(): TODO\n"); |
|
|
} |
|
|
|
|
|
|
|
464 |
/* Macro which modifies the lower part of a value, or the entire value, |
/* Macro which modifies the lower part of a value, or the entire value, |
465 |
depending on 'mode': */ |
depending on 'mode': */ |
466 |
#define modify(old,new) ( \ |
#define modify(old,new) ( \ |