/[gxemul]/trunk/src/cpus/cpu_x86.c
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Diff of /trunk/src/cpus/cpu_x86.c

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revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_x86.c,v 1.3 2005/09/30 14:17:03 debug Exp $   *  $Id: cpu_x86.c,v 1.7 2006/02/17 18:38:30 debug Exp $
29   *   *
30   *  x86 (and amd64) CPU emulation.   *  x86 (and amd64) CPU emulation.
31   *   *
# Line 95  int x86_cpu_new(struct cpu *cpu, struct Line 95  int x86_cpu_new(struct cpu *cpu, struct
95    
96          cpu->cd.x86.model = models[i];          cpu->cd.x86.model = models[i];
97    
98            cpu->translate_address = x86_translate_address;
99    
100          /*  Initial startup is in 16-bit real mode:  */          /*  Initial startup is in 16-bit real mode:  */
101          cpu->pc = 0xfff0;          cpu->pc = 0xfff0;
102    
# Line 109  int x86_cpu_new(struct cpu *cpu, struct Line 111  int x86_cpu_new(struct cpu *cpu, struct
111          cpu->cd.x86.descr_cache[X86_S_CS].writable = 1;          cpu->cd.x86.descr_cache[X86_S_CS].writable = 1;
112          cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0;          cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0;
113          cpu->cd.x86.s[X86_S_CS] = 0xf000;          cpu->cd.x86.s[X86_S_CS] = 0xf000;
114            cpu->cd.x86.cursegment = X86_S_CS;
115    
116          cpu->cd.x86.idtr = 0;          cpu->cd.x86.idtr = 0;
117          cpu->cd.x86.idtr_limit = 0x3ff;          cpu->cd.x86.idtr_limit = 0x3ff;
118    
         cpu->translate_address = x86_translate_address;  
   
119          cpu->cd.x86.rflags = 0x0002;          cpu->cd.x86.rflags = 0x0002;
120          if (cpu->cd.x86.model.model_number == X86_MODEL_8086)          if (cpu->cd.x86.model.model_number == X86_MODEL_8086)
121                  cpu->cd.x86.rflags |= 0xf000;                  cpu->cd.x86.rflags |= 0xf000;
122    
123            cpu->is_32bit = (cpu->cd.x86.model.model_number < X86_MODEL_AMD64)?
124                1 : 0;
125    
126            if (cpu->is_32bit) {
127                    cpu->update_translation_table = x8632_update_translation_table;
128                    cpu->invalidate_translation_caches =
129                        x8632_invalidate_translation_caches;
130                    cpu->invalidate_code_translation =
131                        x8632_invalidate_code_translation;
132            } else {
133                    cpu->update_translation_table = x86_update_translation_table;
134                    cpu->invalidate_translation_caches =
135                        x86_invalidate_translation_caches;
136                    cpu->invalidate_code_translation =
137                        x86_invalidate_code_translation;
138            }
139    
140          /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */          /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
141          if (cpu_id == 0) {          if (cpu_id == 0) {
142                  debug("%s", cpu->name);                  debug("%s", cpu->name);
# Line 150  void x86_cpu_list_available_types(void) Line 168  void x86_cpu_list_available_types(void)
168          while (models[i].model_number != 0) {          while (models[i].model_number != 0) {
169                  debug("%s", models[i].name);                  debug("%s", models[i].name);
170    
171                  for (j=0; j<10-strlen(models[i].name); j++)                  for (j=0; j<10-(int)strlen(models[i].name); j++)
172                          debug(" ");                          debug(" ");
173                  i++;                  i++;
174                  if ((i % 6) == 0 || models[i].name == NULL)                  if ((i % 6) == 0 || models[i].name == NULL)
# Line 443  void x86_cpu_register_match(struct machi Line 461  void x86_cpu_register_match(struct machi
461  }  }
462    
463    
 /*  
  *  x86_cpu_show_full_statistics():  
  *  
  *  Show detailed statistics on opcode usage on each cpu.  
  */  
 void x86_cpu_show_full_statistics(struct machine *m)  
 {  
         fatal("x86_cpu_show_full_statistics(): TODO\n");  
 }  
   
   
 /*  
  *  x86_cpu_tlbdump():  
  *  
  *  Called from the debugger to dump the TLB in a readable format.  
  *  x is the cpu number to dump, or -1 to dump all CPUs.  
  *  
  *  If rawflag is nonzero, then the TLB contents isn't formated nicely,  
  *  just dumped.  
  */  
 void x86_cpu_tlbdump(struct machine *m, int x, int rawflag)  
 {  
         fatal("ppc_cpu_tlbdump(): TODO\n");  
 }  
   
   
464  /*  Macro which modifies the lower part of a value, or the entire value,  /*  Macro which modifies the lower part of a value, or the entire value,
465      depending on 'mode':  */      depending on 'mode':  */
466  #define modify(old,new) (                                       \  #define modify(old,new) (                                       \
# Line 516  static uint32_t read_imm_and_print(unsig Line 508  static uint32_t read_imm_and_print(unsig
508  }  }
509    
510    
511  static uint32_t read_imm(unsigned char **instrp, uint64_t *newpcp,  uint32_t read_imm(unsigned char **instrp, uint64_t *newpcp,
512          int mode)          int mode)
513  {  {
514          return read_imm_common(instrp, newpcp, mode, 0);          return read_imm_common(instrp, newpcp, mode, 0);
515  }  }
516    
517    
518  static void print_csip(struct cpu *cpu)  void print_csip(struct cpu *cpu)
519  {  {
520          fatal("0x%04x:", cpu->cd.x86.s[X86_S_CS]);          fatal("0x%04x:", cpu->cd.x86.s[X86_S_CS]);
521          if (PROTECTED_MODE)          if (PROTECTED_MODE)
# Line 721  void reload_segment_descriptor(struct cp Line 713  void reload_segment_descriptor(struct cp
713          int segment = 1, rpl, orig_selector = selector;          int segment = 1, rpl, orig_selector = selector;
714          unsigned char descr[8];          unsigned char descr[8];
715          char *table_name = "GDT";          char *table_name = "GDT";
716          uint64_t base, limit, table_base, table_limit;          uint64_t base, limit, table_base;
717            int64_t table_limit;
718    
719          if (segnr > 0x100)      /*  arbitrary, larger than N_X86_SEGS  */          if (segnr > 0x100)      /*  arbitrary, larger than N_X86_SEGS  */
720                  segment = 0;                  segment = 0;
# Line 2436  int x86_cpu_disassemble_instr(struct cpu Line 2429  int x86_cpu_disassemble_instr(struct cpu
2429   *   *
2430   *  TODO: Level 1 and 2 info.   *  TODO: Level 1 and 2 info.
2431   */   */
2432  static void x86_cpuid(struct cpu *cpu)  void x86_cpuid(struct cpu *cpu)
2433  {  {
2434          switch (cpu->cd.x86.r[X86_R_AX]) {          switch (cpu->cd.x86.r[X86_R_AX]) {
2435          /*  Normal CPU id:  */          /*  Normal CPU id:  */
# Line 2604  int x86_interrupt(struct cpu *cpu, int n Line 2597  int x86_interrupt(struct cpu *cpu, int n
2597          if (PROTECTED_MODE) {          if (PROTECTED_MODE) {
2598                  int i, int_type = 0;                  int i, int_type = 0;
2599    
2600                  if (nr * 8 > cpu->cd.x86.idtr_limit) {                  if (nr * 8 > (int)cpu->cd.x86.idtr_limit) {
2601                          fatal("TODO: protected mode int 0x%02x outside idtr"                          fatal("TODO: protected mode int 0x%02x outside idtr"
2602                              " limit (%i)?\n", nr, (int)cpu->cd.x86.idtr_limit);                              " limit (%i)?\n", nr, (int)cpu->cd.x86.idtr_limit);
2603                          cpu->running = 0;                          cpu->running = 0;
# Line 2746  int x86_interrupt(struct cpu *cpu, int n Line 2739  int x86_interrupt(struct cpu *cpu, int n
2739          /*          /*
2740           *  Real mode:           *  Real mode:
2741           */           */
2742          if (nr * 4 > cpu->cd.x86.idtr_limit) {          if (nr * 4 > (int)cpu->cd.x86.idtr_limit) {
2743                  fatal("TODO: real mode int 0x%02x outside idtr limit ("                  fatal("TODO: real mode int 0x%02x outside idtr limit ("
2744                      "%i)?\n", nr, (int)cpu->cd.x86.idtr_limit);                      "%i)?\n", nr, (int)cpu->cd.x86.idtr_limit);
2745                  cpu->running = 0;                  cpu->running = 0;
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