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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_x86.c,v 1.3 2005/09/30 14:17:03 debug Exp $ |
* $Id: cpu_x86.c,v 1.16 2006/06/24 21:47:23 debug Exp $ |
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* |
* |
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* x86 (and amd64) CPU emulation. |
* x86 (and amd64) CPU emulation. |
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* |
* |
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cpu->cd.x86.model = models[i]; |
cpu->cd.x86.model = models[i]; |
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cpu->translate_v2p = x86_translate_v2p; |
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/* Initial startup is in 16-bit real mode: */ |
/* Initial startup is in 16-bit real mode: */ |
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cpu->pc = 0xfff0; |
cpu->pc = 0xfff0; |
102 |
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cpu->cd.x86.descr_cache[X86_S_CS].writable = 1; |
cpu->cd.x86.descr_cache[X86_S_CS].writable = 1; |
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cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0; |
cpu->cd.x86.descr_cache[X86_S_CS].granularity = 0; |
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cpu->cd.x86.s[X86_S_CS] = 0xf000; |
cpu->cd.x86.s[X86_S_CS] = 0xf000; |
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cpu->cd.x86.cursegment = X86_S_CS; |
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cpu->cd.x86.idtr = 0; |
cpu->cd.x86.idtr = 0; |
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cpu->cd.x86.idtr_limit = 0x3ff; |
cpu->cd.x86.idtr_limit = 0x3ff; |
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cpu->translate_address = x86_translate_address; |
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cpu->cd.x86.rflags = 0x0002; |
cpu->cd.x86.rflags = 0x0002; |
120 |
if (cpu->cd.x86.model.model_number == X86_MODEL_8086) |
if (cpu->cd.x86.model.model_number == X86_MODEL_8086) |
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cpu->cd.x86.rflags |= 0xf000; |
cpu->cd.x86.rflags |= 0xf000; |
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cpu->is_32bit = (cpu->cd.x86.model.model_number < X86_MODEL_AMD64)? |
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1 : 0; |
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126 |
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if (cpu->is_32bit) { |
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cpu->update_translation_table = x8632_update_translation_table; |
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cpu->invalidate_translation_caches = |
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x8632_invalidate_translation_caches; |
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cpu->invalidate_code_translation = |
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x8632_invalidate_code_translation; |
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} else { |
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cpu->update_translation_table = x86_update_translation_table; |
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cpu->invalidate_translation_caches = |
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x86_invalidate_translation_caches; |
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cpu->invalidate_code_translation = |
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x86_invalidate_code_translation; |
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} |
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/* Only show name and caches etc for CPU nr 0 (in SMP machines): */ |
/* Only show name and caches etc for CPU nr 0 (in SMP machines): */ |
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if (cpu_id == 0) { |
if (cpu_id == 0) { |
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debug("%s", cpu->name); |
debug("%s", cpu->name); |
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while (models[i].model_number != 0) { |
while (models[i].model_number != 0) { |
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debug("%s", models[i].name); |
debug("%s", models[i].name); |
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for (j=0; j<10-strlen(models[i].name); j++) |
for (j=0; j<10-(int)strlen(models[i].name); j++) |
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debug(" "); |
debug(" "); |
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i++; |
i++; |
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if ((i % 6) == 0 || models[i].name == NULL) |
if ((i % 6) == 0 || models[i].name == NULL) |
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uint64_t offset; |
uint64_t offset; |
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int i, x = cpu->cpu_id; |
int i, x = cpu->cpu_id; |
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if (REAL_MODE) { |
if (LONG_MODE) { |
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/* Real-mode: */ |
/* 64-bit long mode: */ |
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debug("cpu%i: cs:ip = 0x%04x:0x%04x\n", x, |
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cpu->cd.x86.s[X86_S_CS], (int)cpu->pc); |
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debug("cpu%i: ax = 0x%04x bx = 0x%04x cx = 0x%04x dx = " |
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"0x%04x\n", x, |
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(int)cpu->cd.x86.r[X86_R_AX], (int)cpu->cd.x86.r[X86_R_BX], |
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(int)cpu->cd.x86.r[X86_R_CX], (int)cpu->cd.x86.r[X86_R_DX]); |
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debug("cpu%i: si = 0x%04x di = 0x%04x bp = 0x%04x sp = " |
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"0x%04x\n", x, |
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(int)cpu->cd.x86.r[X86_R_SI], (int)cpu->cd.x86.r[X86_R_DI], |
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(int)cpu->cd.x86.r[X86_R_BP], (int)cpu->cd.x86.r[X86_R_SP]); |
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debug("cpu%i: ds = 0x%04x es = 0x%04x ss = 0x%04x flags " |
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"= 0x%04x\n", x, |
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(int)cpu->cd.x86.s[X86_S_DS], (int)cpu->cd.x86.s[X86_S_ES], |
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(int)cpu->cd.x86.s[X86_S_SS], (int)cpu->cd.x86.rflags); |
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} else { |
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
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cpu->pc, &offset); |
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debug("cpu%i: eip=0x", x); |
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debug("%08x", (int)cpu->pc); |
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debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
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debug("cpu%i: eax=0x%08x ebx=0x%08x ecx=0x%08x edx=" |
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"0x%08x\n", x, |
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(int)cpu->cd.x86.r[X86_R_AX], (int)cpu->cd.x86.r[X86_R_BX], |
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(int)cpu->cd.x86.r[X86_R_CX], (int)cpu->cd.x86.r[X86_R_DX]); |
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debug("cpu%i: esi=0x%08x edi=0x%08x ebp=0x%08x esp=" |
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"0x%08x\n", x, |
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(int)cpu->cd.x86.r[X86_R_SI], (int)cpu->cd.x86.r[X86_R_DI], |
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(int)cpu->cd.x86.r[X86_R_BP], (int)cpu->cd.x86.r[X86_R_SP]); |
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#if 0 |
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} else { |
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/* 64-bit */ |
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
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cpu->pc, &offset); |
cpu->pc, &offset); |
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debug("cpu%i: rip = 0x", x); |
debug("cpu%i: rip = 0x%016"PRIx64, x, cpu->pc); |
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debug("%016llx", (long long)cpu->pc); |
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debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
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for (i=0; i<N_X86_REGS; i++) { |
for (i=0; i<N_X86_REGS; i++) { |
201 |
if ((i & 1) == 0) |
if ((i & 1) == 0) |
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debug("cpu%i:", x); |
debug("cpu%i:", x); |
203 |
debug(" r%s = 0x%016llx", reg_names[i], |
debug(" r%s = 0x%016"PRIx64, reg_names[i], |
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(long long)cpu->cd.x86.r[i]); |
(uint64_t)cpu->cd.x86.r[i]); |
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if ((i & 1) == 1) |
if ((i & 1) == 1) |
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debug("\n"); |
debug("\n"); |
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} |
} |
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#endif |
} else if (REAL_MODE) { |
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/* 16-bit real-mode: */ |
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debug("cpu%i: cs:ip = 0x%04"PRIx16":0x%04"PRIx16"\n", x, |
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cpu->cd.x86.s[X86_S_CS], (uint16_t)cpu->pc); |
212 |
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213 |
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debug("cpu%i: ax = 0x%04"PRIx16" bx = 0x%04"PRIx16 |
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" cx = 0x%04"PRIx16" dx = 0x%04"PRIx16"\n", x, |
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(uint16_t)cpu->cd.x86.r[X86_R_AX], |
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(uint16_t)cpu->cd.x86.r[X86_R_BX], |
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(uint16_t)cpu->cd.x86.r[X86_R_CX], |
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(uint16_t)cpu->cd.x86.r[X86_R_DX]); |
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debug("cpu%i: si = 0x%04"PRIx16" di = 0x%04"PRIx16 |
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" bp = 0x%04"PRIx16" sp = 0x%04"PRIx16"\n", x, |
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(uint16_t)cpu->cd.x86.r[X86_R_SI], |
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(uint16_t)cpu->cd.x86.r[X86_R_DI], |
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(uint16_t)cpu->cd.x86.r[X86_R_BP], |
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(uint16_t)cpu->cd.x86.r[X86_R_SP]); |
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debug("cpu%i: ds = 0x%04"PRIx16" es = 0x%04"PRIx16 |
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" ss = 0x%04"PRIx16" flags = 0x%04"PRIx16"\n", x, |
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(uint16_t)cpu->cd.x86.s[X86_S_DS], |
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(uint16_t)cpu->cd.x86.s[X86_S_ES], |
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(uint16_t)cpu->cd.x86.s[X86_S_SS], |
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(uint16_t)cpu->cd.x86.rflags); |
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} else { |
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/* 32-bit protected mode: */ |
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
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cpu->pc, &offset); |
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debug("cpu%i: eip=0x%08"PRIx32, x, (uint32_t)cpu->pc); |
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debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
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239 |
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debug("cpu%i: eax=0x%08"PRIx32" ebx=0x%08"PRIx32 |
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" ecx=0x%08"PRIx32" edx=0x%08"PRIx32"\n", x, |
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(uint32_t)cpu->cd.x86.r[X86_R_AX], |
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(uint32_t)cpu->cd.x86.r[X86_R_BX], |
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(uint32_t)cpu->cd.x86.r[X86_R_CX], |
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(uint32_t)cpu->cd.x86.r[X86_R_DX]); |
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debug("cpu%i: esi=0x%08"PRIx32" edi=0x%08"PRIx32 |
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" ebp=0x%08"PRIx32" esp=0x%08"PRIx32"\n", x, |
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(uint32_t)cpu->cd.x86.r[X86_R_SI], |
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(uint32_t)cpu->cd.x86.r[X86_R_DI], |
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(uint32_t)cpu->cd.x86.r[X86_R_BP], |
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(uint32_t)cpu->cd.x86.r[X86_R_SP]); |
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} |
} |
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if (coprocs != 0) { |
if (coprocs != 0) { |
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cpu->machine->isa_pic_data.pic2->irq_base); |
cpu->machine->isa_pic_data.pic2->irq_base); |
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} else if (PROTECTED_MODE) { |
} else if (PROTECTED_MODE) { |
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/* Protected mode: */ |
/* Protected mode: */ |
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debug("cpu%i: cs=0x%04x ds=0x%04x es=0x%04x " |
debug("cpu%i: cs=0x%04"PRIx16" ds=0x%04"PRIx16" es=0x%04" |
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"fs=0x%04x gs=0x%04x ss=0x%04x\n", x, |
PRIx16" fs=0x%04"PRIx16" gs=0x%04"PRIx16" ss=0x%04" |
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(int)cpu->cd.x86.s[X86_S_CS], (int)cpu->cd.x86.s[X86_S_DS], |
PRIx16"\n", x, (uint16_t)cpu->cd.x86.s[X86_S_CS], |
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(int)cpu->cd.x86.s[X86_S_ES], (int)cpu->cd.x86.s[X86_S_FS], |
(uint16_t)cpu->cd.x86.s[X86_S_DS], |
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(int)cpu->cd.x86.s[X86_S_GS], (int)cpu->cd.x86.s[X86_S_SS]); |
(uint16_t)cpu->cd.x86.s[X86_S_ES], |
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(uint16_t)cpu->cd.x86.s[X86_S_FS], |
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(uint16_t)cpu->cd.x86.s[X86_S_GS], |
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(uint16_t)cpu->cd.x86.s[X86_S_SS]); |
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} |
} |
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if (PROTECTED_MODE) { |
if (PROTECTED_MODE) { |
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/* Protected mode: */ |
/* Protected mode: */ |
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debug("cpu%i: cr0=0x%08x cr2=0x%08x cr3=0x%08x eflags=" |
debug("cpu%i: cr0=0x%08"PRIx32" cr2=0x%08"PRIx32" cr3=0x%08" |
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"0x%08x\n", x, (int)cpu->cd.x86.cr[0], |
PRIx32" eflags=0x%08"PRIx32"\n", x, |
303 |
(int)cpu->cd.x86.cr[2], (int)cpu->cd.x86.cr[3], |
(uint32_t)cpu->cd.x86.cr[0], (uint32_t)cpu->cd.x86.cr[2], |
304 |
(int)cpu->cd.x86.rflags); |
(uint32_t)cpu->cd.x86.cr[3], (uint32_t)cpu->cd.x86.rflags); |
305 |
debug("cpu%i: tr = 0x%04x (base=0x%llx, limit=0x%x)\n", |
debug("cpu%i: tr = 0x%04"PRIx16" (base=0x%"PRIx64", limit=0x" |
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x, (int)cpu->cd.x86.tr, (long long)cpu->cd.x86.tr_base, |
PRIx32")\n", x, (uint16_t)cpu->cd.x86.tr, (uint64_t) |
307 |
(int)cpu->cd.x86.tr_limit); |
cpu->cd.x86.tr_base, (uint32_t)cpu->cd.x86.tr_limit); |
308 |
} |
} |
309 |
} |
} |
310 |
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470 |
} |
} |
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/* |
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* x86_cpu_show_full_statistics(): |
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* |
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* Show detailed statistics on opcode usage on each cpu. |
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*/ |
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void x86_cpu_show_full_statistics(struct machine *m) |
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{ |
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fatal("x86_cpu_show_full_statistics(): TODO\n"); |
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} |
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/* |
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* x86_cpu_tlbdump(): |
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* |
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* Called from the debugger to dump the TLB in a readable format. |
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* x is the cpu number to dump, or -1 to dump all CPUs. |
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* |
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* If rawflag is nonzero, then the TLB contents isn't formated nicely, |
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* just dumped. |
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*/ |
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void x86_cpu_tlbdump(struct machine *m, int x, int rawflag) |
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{ |
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fatal("ppc_cpu_tlbdump(): TODO\n"); |
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} |
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473 |
/* Macro which modifies the lower part of a value, or the entire value, |
/* Macro which modifies the lower part of a value, or the entire value, |
474 |
depending on 'mode': */ |
depending on 'mode': */ |
475 |
#define modify(old,new) ( \ |
#define modify(old,new) ( \ |
517 |
} |
} |
518 |
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519 |
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520 |
static uint32_t read_imm(unsigned char **instrp, uint64_t *newpcp, |
uint32_t read_imm(unsigned char **instrp, uint64_t *newpcp, |
521 |
int mode) |
int mode) |
522 |
{ |
{ |
523 |
return read_imm_common(instrp, newpcp, mode, 0); |
return read_imm_common(instrp, newpcp, mode, 0); |
524 |
} |
} |
525 |
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526 |
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527 |
static void print_csip(struct cpu *cpu) |
void print_csip(struct cpu *cpu) |
528 |
{ |
{ |
529 |
fatal("0x%04x:", cpu->cd.x86.s[X86_S_CS]); |
fatal("0x%04x:", cpu->cd.x86.s[X86_S_CS]); |
530 |
if (PROTECTED_MODE) |
if (PROTECTED_MODE) |
535 |
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536 |
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537 |
/* |
/* |
538 |
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* x86_cpu_tlbdump(): |
539 |
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* |
540 |
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* Called from the debugger to dump the TLB in a readable format. |
541 |
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* x is the cpu number to dump, or -1 to dump all CPUs. |
542 |
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* |
543 |
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* If rawflag is nonzero, then the TLB contents isn't formated nicely, |
544 |
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* just dumped. |
545 |
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*/ |
546 |
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void x86_cpu_tlbdump(struct machine *m, int x, int rawflag) |
547 |
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{ |
548 |
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} |
549 |
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550 |
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551 |
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/* |
552 |
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* x86_cpu_gdb_stub(): |
553 |
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* |
554 |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
555 |
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* on success, NULL on failure. |
556 |
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*/ |
557 |
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char *x86_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
558 |
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{ |
559 |
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fatal("x86_cpu_gdb_stub(): TODO\n"); |
560 |
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return NULL; |
561 |
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} |
562 |
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563 |
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564 |
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/* |
565 |
* x86_cpu_interrupt(): |
* x86_cpu_interrupt(): |
566 |
* |
* |
567 |
* NOTE: Interacting with the 8259 PIC is done in src/machine.c. |
* NOTE: Interacting with the 8259 PIC is done in src/machine.c. |
691 |
reload_segment_descriptor(cpu, RELOAD_TR, new_tr, NULL); |
reload_segment_descriptor(cpu, RELOAD_TR, new_tr, NULL); |
692 |
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693 |
if (cpu->cd.x86.tr_limit < 0x67) |
if (cpu->cd.x86.tr_limit < 0x67) |
694 |
fatal("WARNING: tr_limit = 0x%x, must be at least 0x67!\n", |
fatal("WARNING: tr_limit = 0x%"PRIx16", must be at least " |
695 |
(int)cpu->cd.x86.tr_limit); |
"0x67!\n", (uint16_t)cpu->cd.x86.tr_limit); |
696 |
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697 |
/* Read new registers: */ |
/* Read new registers: */ |
698 |
#define READ_VALUE { cpu->memory_rw(cpu, cpu->mem, cpu->cd.x86.tr_base + \ |
#define READ_VALUE { cpu->memory_rw(cpu, cpu->mem, cpu->cd.x86.tr_base + \ |
749 |
int segment = 1, rpl, orig_selector = selector; |
int segment = 1, rpl, orig_selector = selector; |
750 |
unsigned char descr[8]; |
unsigned char descr[8]; |
751 |
char *table_name = "GDT"; |
char *table_name = "GDT"; |
752 |
uint64_t base, limit, table_base, table_limit; |
uint64_t base, limit, table_base; |
753 |
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int64_t table_limit; |
754 |
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|
755 |
if (segnr > 0x100) /* arbitrary, larger than N_X86_SEGS */ |
if (segnr > 0x100) /* arbitrary, larger than N_X86_SEGS */ |
756 |
segment = 0; |
segment = 0; |
1529 |
* The rest of running tells us the default (code) operand size. |
* The rest of running tells us the default (code) operand size. |
1530 |
*/ |
*/ |
1531 |
int x86_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr, |
int x86_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr, |
1532 |
int running, uint64_t dumpaddr, int bintrans) |
int running, uint64_t dumpaddr) |
1533 |
{ |
{ |
1534 |
int op, rep = 0, lock = 0, n_prefix_bytes = 0; |
int op, rep = 0, lock = 0, n_prefix_bytes = 0; |
1535 |
uint64_t ilen = 0, offset; |
uint64_t ilen = 0, offset; |
2465 |
* |
* |
2466 |
* TODO: Level 1 and 2 info. |
* TODO: Level 1 and 2 info. |
2467 |
*/ |
*/ |
2468 |
static void x86_cpuid(struct cpu *cpu) |
void x86_cpuid(struct cpu *cpu) |
2469 |
{ |
{ |
2470 |
switch (cpu->cd.x86.r[X86_R_AX]) { |
switch (cpu->cd.x86.r[X86_R_AX]) { |
2471 |
/* Normal CPU id: */ |
/* Normal CPU id: */ |
2633 |
if (PROTECTED_MODE) { |
if (PROTECTED_MODE) { |
2634 |
int i, int_type = 0; |
int i, int_type = 0; |
2635 |
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2636 |
if (nr * 8 > cpu->cd.x86.idtr_limit) { |
if (nr * 8 > (int)cpu->cd.x86.idtr_limit) { |
2637 |
fatal("TODO: protected mode int 0x%02x outside idtr" |
fatal("TODO: protected mode int 0x%02x outside idtr" |
2638 |
" limit (%i)?\n", nr, (int)cpu->cd.x86.idtr_limit); |
" limit (%i)?\n", nr, (int)cpu->cd.x86.idtr_limit); |
2639 |
cpu->running = 0; |
cpu->running = 0; |
2775 |
/* |
/* |
2776 |
* Real mode: |
* Real mode: |
2777 |
*/ |
*/ |
2778 |
if (nr * 4 > cpu->cd.x86.idtr_limit) { |
if (nr * 4 > (int)cpu->cd.x86.idtr_limit) { |
2779 |
fatal("TODO: real mode int 0x%02x outside idtr limit (" |
fatal("TODO: real mode int 0x%02x outside idtr limit (" |
2780 |
"%i)?\n", nr, (int)cpu->cd.x86.idtr_limit); |
"%i)?\n", nr, (int)cpu->cd.x86.idtr_limit); |
2781 |
cpu->running = 0; |
cpu->running = 0; |
3162 |
} |
} |
3163 |
|
|
3164 |
|
|
3165 |
#define TRANSLATE_ADDRESS x86_translate_address |
#define TRANSLATE_ADDRESS x86_translate_v2p |
3166 |
#include "memory_x86.c" |
#include "memory_x86.c" |
3167 |
#undef TRANSLATE_ADDRESS |
#undef TRANSLATE_ADDRESS |
3168 |
|
|