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/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_transputer_instr.c,v 1.2 2006/07/21 05:46:45 debug Exp $ |
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* |
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* INMOS transputer instructions. |
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* |
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* Individual functions should keep track of cpu->n_translated_instrs. |
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* (n_translated_instrs is automatically increased by 1 for each function |
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* call. If no instruction was executed, then it should be decreased. If, say, |
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* 4 instructions were combined into one function and executed, then it should |
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* be increased by 3.) |
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*/ |
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|
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|
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/* |
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* nop: Do nothing. |
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*/ |
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X(nop) |
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{ |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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/* |
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* j: Relative jump |
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* |
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* arg[0] = relative distance from the _current_ instruction. |
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*/ |
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X(j) |
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{ |
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/* Synchronize the PC and then add the operand + 1: */ |
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int low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page) |
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/ sizeof(struct transputer_instr_call); |
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cpu->pc &= ~(TRANSPUTER_IC_ENTRIES_PER_PAGE-1); |
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cpu->pc += low_pc + ic->arg[0]; |
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quick_pc_to_pointers(cpu); |
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} |
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|
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|
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/* |
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* ldc: Load constant |
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* |
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* arg[0] = constant |
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*/ |
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X(ldc) |
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{ |
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/* TODO: Is oreg really cleared like this? */ |
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cpu->cd.transputer.oreg = ic->arg[0]; |
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cpu->cd.transputer.c = cpu->cd.transputer.b; |
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cpu->cd.transputer.b = cpu->cd.transputer.a; |
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cpu->cd.transputer.a = ic->arg[0]; |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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X(end_of_page) |
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{ |
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/* Update the PC: (offset 0, but on the next page) */ |
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cpu->pc &= ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) << 1); |
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cpu->pc += (TRANSPUTER_IC_ENTRIES_PER_PAGE << 1); |
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|
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/* Find the new physical page and update the translation pointers: */ |
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transputer_pc_to_pointers(cpu); |
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|
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/* end_of_page doesn't count as an executed instruction: */ |
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cpu->n_translated_instrs --; |
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} |
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|
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|
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/*****************************************************************************/ |
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|
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|
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/* |
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* transputer_instr_to_be_translated(): |
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* |
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* Translate an instruction word into an transputer_instr_call. ic is filled in with |
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* valid data for the translated instruction, or a "nothing" instruction if |
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* there was a translation failure. The newly translated instruction is then |
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* executed. |
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*/ |
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X(to_be_translated) |
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{ |
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uint32_t addr, low_pc; |
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unsigned char *page; |
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unsigned char ib[1]; |
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/* void (*samepage_function)(struct cpu *, |
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struct transputer_instr_call *);*/ |
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|
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/* Figure out the (virtual) address of the instruction: */ |
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low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page) |
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/ sizeof(struct transputer_instr_call); |
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addr = cpu->pc & ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) << |
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TRANSPUTER_INSTR_ALIGNMENT_SHIFT); |
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addr += (low_pc << TRANSPUTER_INSTR_ALIGNMENT_SHIFT); |
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cpu->pc = addr; |
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addr &= ~((1 << TRANSPUTER_INSTR_ALIGNMENT_SHIFT) - 1); |
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|
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/* Read the instruction word from memory: */ |
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page = cpu->cd.transputer.host_load[addr >> 12]; |
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|
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if (page != NULL) { |
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/* fatal("TRANSLATION HIT!\n"); */ |
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memcpy(ib, page + (addr & 0xfff), sizeof(ib)); |
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} else { |
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/* fatal("TRANSLATION MISS!\n"); */ |
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if (!cpu->memory_rw(cpu, cpu->mem, addr, ib, |
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sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) { |
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fatal("to_be_translated(): " |
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"read failed: TODO\n"); |
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goto bad; |
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} |
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} |
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|
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|
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#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
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#include "cpu_dyntrans.c" |
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#undef DYNTRANS_TO_BE_TRANSLATED_HEAD |
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|
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|
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/* |
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* Translate the instruction: |
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* -------------------------- |
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* |
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* Most instructions take the operand as arg[0], so we set it |
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* here by default: |
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*/ |
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ic->arg[0] = ib[0] & 0xf; |
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|
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switch (ib[0] >> 4) { |
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|
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case 0: /* j, relative jump */ |
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ic->f = instr(j); |
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ic->arg[0] = (ib[0] & 0xf) + 1; |
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/* TODO: Samepage jump! */ |
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|
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if (cpu->cd.transputer.cpu_type.features & T_DEBUG |
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&& (ib[0] & 0xf) == 0) { |
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/* |
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* From Wikipedia: ... "and, later, the T225. This |
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* added debugging breakpoint support (by extending |
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* the instruction J 0)" |
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*/ |
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fatal("TODO: Transputer Debugger support!\n"); |
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goto bad; |
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} |
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break; |
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|
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case 4: /* ldc, load constant */ |
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ic->f = instr(ldc); |
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break; |
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|
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default:fatal("UNIMPLEMENTED opcode 0x%02x\n", ib[0]); |
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goto bad; |
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} |
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|
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|
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#define DYNTRANS_TO_BE_TRANSLATED_TAIL |
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#include "cpu_dyntrans.c" |
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#undef DYNTRANS_TO_BE_TRANSLATED_TAIL |
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} |
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|