src/cpus/cpu_transputer_instr.c

/*
 *  Copyright (C) 2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_transputer_instr.c,v 1.2 2006/07/21 05:46:45 debug Exp $
 *
 *  INMOS transputer instructions.
 *
 *  Individual functions should keep track of cpu->n_translated_instrs.
 *  (n_translated_instrs is automatically increased by 1 for each function
 *  call. If no instruction was executed, then it should be decreased. If, say,
 *  4 instructions were combined into one function and executed, then it should
 *  be increased by 3.)
 */


/*
 *  nop:  Do nothing.
 */
X(nop)
{
}


/*****************************************************************************/


/*
 *  j:  Relative jump
 *
 *  arg[0] = relative distance from the _current_ instruction.
 */
X(j)
{
        /*  Synchronize the PC and then add the operand + 1:  */
        int low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page)
            / sizeof(struct transputer_instr_call);
        cpu->pc &= ~(TRANSPUTER_IC_ENTRIES_PER_PAGE-1);
        cpu->pc += low_pc + ic->arg[0];
        quick_pc_to_pointers(cpu);
}


/*
 *  ldc: Load constant
 *
 *  arg[0] = constant
 */
X(ldc)
{
        /*  TODO: Is oreg really cleared like this?  */
        cpu->cd.transputer.oreg = ic->arg[0];
        cpu->cd.transputer.c = cpu->cd.transputer.b;
        cpu->cd.transputer.b = cpu->cd.transputer.a;
        cpu->cd.transputer.a = ic->arg[0];
}


/*****************************************************************************/


X(end_of_page)
{
        /*  Update the PC:  (offset 0, but on the next page)  */
        cpu->pc &= ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) << 1);
        cpu->pc += (TRANSPUTER_IC_ENTRIES_PER_PAGE << 1);

        /*  Find the new physical page and update the translation pointers:  */
        transputer_pc_to_pointers(cpu);

        /*  end_of_page doesn't count as an executed instruction:  */
        cpu->n_translated_instrs --;
}


/*****************************************************************************/


/*
 *  transputer_instr_to_be_translated():
 *
 *  Translate an instruction word into an transputer_instr_call. ic is filled in with
 *  valid data for the translated instruction, or a "nothing" instruction if
 *  there was a translation failure. The newly translated instruction is then
 *  executed.
 */
X(to_be_translated)
{
        uint32_t addr, low_pc;
        unsigned char *page;
        unsigned char ib[1];
        /* void (*samepage_function)(struct cpu *,
            struct transputer_instr_call *);*/

        /*  Figure out the (virtual) address of the instruction:  */
        low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page)
            / sizeof(struct transputer_instr_call);
        addr = cpu->pc & ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) <<
            TRANSPUTER_INSTR_ALIGNMENT_SHIFT);
        addr += (low_pc << TRANSPUTER_INSTR_ALIGNMENT_SHIFT);
        cpu->pc = addr;
        addr &= ~((1 << TRANSPUTER_INSTR_ALIGNMENT_SHIFT) - 1);

        /*  Read the instruction word from memory:  */
        page = cpu->cd.transputer.host_load[addr >> 12];

        if (page != NULL) {
                /*  fatal("TRANSLATION HIT!\n");  */
                memcpy(ib, page + (addr & 0xfff), sizeof(ib));
        } else {
                /*  fatal("TRANSLATION MISS!\n");  */
                if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
                    sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
                        fatal("to_be_translated(): "
                            "read failed: TODO\n");
                        goto bad;
                }
        }


#define DYNTRANS_TO_BE_TRANSLATED_HEAD
#include "cpu_dyntrans.c"
#undef  DYNTRANS_TO_BE_TRANSLATED_HEAD


        /*
         *  Translate the instruction:
         *  --------------------------
         *
         *  Most instructions take the operand as arg[0], so we set it
         *  here by default:
         */
        ic->arg[0] = ib[0] & 0xf;

        switch (ib[0] >> 4) {

        case 0: /*  j, relative jump  */
                ic->f = instr(j);
                ic->arg[0] = (ib[0] & 0xf) + 1;
                /*  TODO: Samepage jump!  */

                if (cpu->cd.transputer.cpu_type.features & T_DEBUG
                    && (ib[0] & 0xf) == 0) {
                        /*
                         *  From Wikipedia:  ... "and, later, the T225. This
                         *  added debugging breakpoint support (by extending
                         *  the instruction J 0)"
                         */
                        fatal("TODO: Transputer Debugger support!\n");
                        goto bad;
                }
                break;

        case 4: /*  ldc, load constant  */
                ic->f = instr(ldc);
                break;

        default:fatal("UNIMPLEMENTED opcode 0x%02x\n", ib[0]);
                goto bad;
        }


#define DYNTRANS_TO_BE_TRANSLATED_TAIL
#include "cpu_dyntrans.c" 
#undef  DYNTRANS_TO_BE_TRANSLATED_TAIL
}

1	dpavlin	28	/*
2			* Copyright (C) 2006 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28			* $Id: cpu_transputer_instr.c,v 1.2 2006/07/21 05:46:45 debug Exp $
29			*
30			* INMOS transputer instructions.
31			*
32			* Individual functions should keep track of cpu->n_translated_instrs.
33			* (n_translated_instrs is automatically increased by 1 for each function
34			* call. If no instruction was executed, then it should be decreased. If, say,
35			* 4 instructions were combined into one function and executed, then it should
36			* be increased by 3.)
37			*/
38
39
40			/*
41			* nop: Do nothing.
42			*/
43			X(nop)
44			{
45			}
46
47
48			/*****************************************************************************/
49
50
51			/*
52			* j: Relative jump
53			*
54			* arg[0] = relative distance from the _current_ instruction.
55			*/
56			X(j)
57			{
58			/* Synchronize the PC and then add the operand + 1: */
59			int low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page)
60			/ sizeof(struct transputer_instr_call);
61			cpu->pc &= ~(TRANSPUTER_IC_ENTRIES_PER_PAGE-1);
62			cpu->pc += low_pc + ic->arg[0];
63			quick_pc_to_pointers(cpu);
64			}
65
66
67			/*
68			* ldc: Load constant
69			*
70			* arg[0] = constant
71			*/
72			X(ldc)
73			{
74			/* TODO: Is oreg really cleared like this? */
75			cpu->cd.transputer.oreg = ic->arg[0];
76			cpu->cd.transputer.c = cpu->cd.transputer.b;
77			cpu->cd.transputer.b = cpu->cd.transputer.a;
78			cpu->cd.transputer.a = ic->arg[0];
79			}
80
81
82			/*****************************************************************************/
83
84
85			X(end_of_page)
86			{
87			/* Update the PC: (offset 0, but on the next page) */
88			cpu->pc &= ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) << 1);
89			cpu->pc += (TRANSPUTER_IC_ENTRIES_PER_PAGE << 1);
90
91			/* Find the new physical page and update the translation pointers: */
92			transputer_pc_to_pointers(cpu);
93
94			/* end_of_page doesn't count as an executed instruction: */
95			cpu->n_translated_instrs --;
96			}
97
98
99			/*****************************************************************************/
100
101
102			/*
103			* transputer_instr_to_be_translated():
104			*
105			* Translate an instruction word into an transputer_instr_call. ic is filled in with
106			* valid data for the translated instruction, or a "nothing" instruction if
107			* there was a translation failure. The newly translated instruction is then
108			* executed.
109			*/
110			X(to_be_translated)
111			{
112			uint32_t addr, low_pc;
113			unsigned char *page;
114			unsigned char ib[1];
115			/* void (samepage_function)(struct cpu ,
116			struct transputer_instr_call );/
117
118			/* Figure out the (virtual) address of the instruction: */
119			low_pc = ((size_t)ic - (size_t)cpu->cd.transputer.cur_ic_page)
120			/ sizeof(struct transputer_instr_call);
121			addr = cpu->pc & ~((TRANSPUTER_IC_ENTRIES_PER_PAGE-1) <<
122			TRANSPUTER_INSTR_ALIGNMENT_SHIFT);
123			addr += (low_pc << TRANSPUTER_INSTR_ALIGNMENT_SHIFT);
124			cpu->pc = addr;
125			addr &= ~((1 << TRANSPUTER_INSTR_ALIGNMENT_SHIFT) - 1);
126
127			/* Read the instruction word from memory: */
128			page = cpu->cd.transputer.host_load[addr >> 12];
129
130			if (page != NULL) {
131			/* fatal("TRANSLATION HIT!\n"); */
132			memcpy(ib, page + (addr & 0xfff), sizeof(ib));
133			} else {
134			/* fatal("TRANSLATION MISS!\n"); */
135			if (!cpu->memory_rw(cpu, cpu->mem, addr, ib,
136			sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) {
137			fatal("to_be_translated(): "
138			"read failed: TODO\n");
139			goto bad;
140			}
141			}
142
143
144			#define DYNTRANS_TO_BE_TRANSLATED_HEAD
145			#include "cpu_dyntrans.c"
146			#undef DYNTRANS_TO_BE_TRANSLATED_HEAD
147
148
149			/*
150			* Translate the instruction:
151			* --------------------------
152			*
153			* Most instructions take the operand as arg[0], so we set it
154			* here by default:
155			*/
156			ic->arg[0] = ib[0] & 0xf;
157
158			switch (ib[0] >> 4) {
159
160			case 0: /* j, relative jump */
161			ic->f = instr(j);
162			ic->arg[0] = (ib[0] & 0xf) + 1;
163			/* TODO: Samepage jump! */
164
165			if (cpu->cd.transputer.cpu_type.features & T_DEBUG
166			&& (ib[0] & 0xf) == 0) {
167			/*
168			* From Wikipedia: ... "and, later, the T225. This
169			* added debugging breakpoint support (by extending
170			* the instruction J 0)"
171			*/
172			fatal("TODO: Transputer Debugger support!\n");
173			goto bad;
174			}
175			break;
176
177			case 4: /* ldc, load constant */
178			ic->f = instr(ldc);
179			break;
180
181			default:fatal("UNIMPLEMENTED opcode 0x%02x\n", ib[0]);
182			goto bad;
183			}
184
185
186			#define DYNTRANS_TO_BE_TRANSLATED_TAIL
187			#include "cpu_dyntrans.c"
188			#undef DYNTRANS_TO_BE_TRANSLATED_TAIL
189			}
190