src/cpus/cpu_transputer.c

/*
 *  Copyright (C) 2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_transputer.c,v 1.4 2006/07/23 14:37:34 debug Exp $
 *
 *  INMOS transputer CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "symbol.h"

#define DYNTRANS_32
#include "tmp_transputer_head.c"


static char *opcode_names[16] = TRANSPUTER_INSTRUCTIONS;
static char *opcode_f_names[N_TRANSPUTER_OPC_F_NAMES] = TRANSPUTER_OPC_F_NAMES;

/*
 *  transputer_cpu_new():
 *
 *  Create a new TRANSPUTER cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching TRANSPUTER processor with
 *  this cpu_type_name.
 */
int transputer_cpu_new(struct cpu *cpu, struct memory *mem,
        struct machine *machine, int cpu_id, char *cpu_type_name)
{
        int i = 0;
        struct transputer_cpu_type_def cpu_type_defs[] =
            TRANSPUTER_CPU_TYPE_DEFS;

        /*  Scan the cpu_type_defs list for this cpu type:  */
        while (cpu_type_defs[i].name != NULL) {
                if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) {
                        break;
                }
                i++;
        }
        if (cpu_type_defs[i].name == NULL)
                return 0;

        cpu->cd.transputer.cpu_type = cpu_type_defs[i];
        cpu->name = cpu->cd.transputer.cpu_type.name;
        cpu->byte_order = EMUL_LITTLE_ENDIAN;
        cpu->is_32bit = 1;

        if (cpu->cd.transputer.cpu_type.bits != 32) {
                fatal("Only 32-bit Transputer processors can be "
                    "emulated. 16-bit mode is not supported. Sorry.\n");
                exit(1);
        }

        cpu->run_instr = transputer_run_instr;
        cpu->memory_rw = transputer_memory_rw;
        cpu->update_translation_table = transputer_update_translation_table;
        cpu->invalidate_translation_caches =
            transputer_invalidate_translation_caches;
        cpu->invalidate_code_translation =
            transputer_invalidate_code_translation;

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        cpu->cd.transputer.wptr = machine->physical_ram_in_mb * 1048576 - 2048;

        return 1;
}


/*
 *  transputer_cpu_list_available_types():
 *
 *  Print a list of available TRANSPUTER CPU types.
 */
void transputer_cpu_list_available_types(void)
{
        int i = 0, j;
        struct transputer_cpu_type_def tdefs[] = TRANSPUTER_CPU_TYPE_DEFS;
        
        while (tdefs[i].name != NULL) {
                debug("%s", tdefs[i].name);
                for (j = 7 - strlen(tdefs[i].name); j > 0; j --)
                        debug(" ");
                i ++;
                if ((i % 8) == 0 || tdefs[i].name == NULL)
                        debug("\n");
        }
}


/*
 *  transputer_cpu_dumpinfo():
 */
void transputer_cpu_dumpinfo(struct cpu *cpu)
{
        /*  TODO  */
        debug("\n");
}


/*
 *  transputer_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void transputer_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset;
        int x = cpu->cpu_id;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            cpu->pc, &offset);

        debug("cpu%i: wptr = 0x%08"PRIx32"  oreg = 0x%08"PRIx32"  ip = 0x%08"
            PRIx32, x, cpu->cd.transputer.wptr, cpu->cd.transputer.oreg,
            (uint32_t)cpu->pc);
        debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");

        debug("cpu%i:    a = 0x%08"PRIx32"     b = 0x%08"PRIx32"   c = 0x%08"
            PRIx32"\n", x, cpu->cd.transputer.a, cpu->cd.transputer.b,
            cpu->cd.transputer.c);

        /*  TODO: Error flags, Floating point registers, etc.  */
}


/*
 *  transputer_cpu_register_match():
 */
void transputer_cpu_register_match(struct machine *m, char *name,
        int writeflag, uint64_t *valuep, int *match_register)
{
        int cpunr = 0;

        /*  CPU number:  */
        /*  TODO  */

        /*  Register name:  */
        if (strcasecmp(name, "pc") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->pc = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->pc;
                *match_register = 1;
        }

        if (strcasecmp(name, "a") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->cd.transputer.a = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->cd.transputer.a;
                *match_register = 1;
        }

        if (strcasecmp(name, "b") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->cd.transputer.b = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->cd.transputer.b;
                *match_register = 1;
        }

        if (strcasecmp(name, "c") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->cd.transputer.c = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->cd.transputer.c;
                *match_register = 1;
        }

        if (strcasecmp(name, "wptr") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->cd.transputer.wptr = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->cd.transputer.wptr;
                *match_register = 1;
        }

        if (strcasecmp(name, "oreg") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->cd.transputer.oreg = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->cd.transputer.oreg;
                *match_register = 1;
        }

        /*  TODO: Front and back pointers, etc.  */
}


/*
 *  transputer_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void transputer_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
}


/*
 *  transputer_cpu_gdb_stub():
 *
 *  Execute a "remote GDB" command. Returns a newly allocated response string
 *  on success, NULL on failure.
 */
char *transputer_cpu_gdb_stub(struct cpu *cpu, char *cmd)
{
        fatal("transputer_cpu_gdb_stub(): TODO\n");
        return NULL;
}


/*
 *  transputer_cpu_interrupt():
 */
int transputer_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
{
        fatal("transputer_cpu_interrupt(): TODO\n");
        return 0;
}


/*
 *  transputer_cpu_interrupt_ack():
 */
int transputer_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
{
        /*  fatal("transputer_cpu_interrupt_ack(): TODO\n");  */
        return 0;
}


/*
 *  transputer_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing. On Transputers, an opcode is one byte, optionally followed by
 *  more instruction bytes.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int transputer_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
        int running, uint64_t dumpaddr)
{
        uint64_t offset;
        char *symbol;
        int opcode, operand;

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

        debug("0x%08x:  ", (int)dumpaddr);

        opcode = ib[0] >> 4;
        operand = ib[0] & 15;
        debug("%02x   %-6s %2i", ib[0], opcode_names[opcode], operand);

        /*
         *  For opcodes where it is nice to have additional runtime info,
         *  special cases need to be added here. (E.g. an instruction which
         *  updates registers can show the contents of the new registers
         *  after the update.)
         */

        switch (opcode) {

        case T_OPC_PFIX:
                if (running) {
                        uint32_t oreg = cpu->cd.transputer.oreg | operand;
                        debug("\toreg = 0x%"PRIx32, oreg << 4);
                }
                break;

        case T_OPC_LDC:
                if (running) {
                        uint32_t new_c = cpu->cd.transputer.b;
                        uint32_t new_b = cpu->cd.transputer.a;
                        uint32_t new_a = cpu->cd.transputer.oreg | operand;
                        debug("\ta=0x%"PRIx32", b=0x%"PRIx32", c=0x%"PRIx32,
                            new_a, new_b, new_c);
                }
                break;

        case T_OPC_STL:
                if (running) {
                        uint32_t addr = (cpu->cd.transputer.oreg | operand)
                            * sizeof(uint32_t) + cpu->cd.transputer.wptr;
                        debug("\t[0x%"PRIx32"] = 0x%x", addr,
                            cpu->cd.transputer.a);
                }
                break;

        case T_OPC_OPR:
                if (running) {
                        uint32_t fopcode = cpu->cd.transputer.oreg | operand;
                        debug("\t");
                        if (fopcode < N_TRANSPUTER_OPC_F_NAMES)
                                debug("%s", opcode_f_names[fopcode]);
                        else
                                debug("0x%"PRIx32, fopcode);
                }
                break;

        }

        debug("\n");

        return 1;
}


#include "tmp_transputer_tail.c"

1	dpavlin	28	/*
2			* Copyright (C) 2006 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	30	* $Id: cpu_transputer.c,v 1.4 2006/07/23 14:37:34 debug Exp $
29	dpavlin	28	*
30			* INMOS transputer CPU emulation.
31			*/
32
33			#include <stdio.h>
34			#include <stdlib.h>
35			#include <string.h>
36			#include <ctype.h>
37
38			#include "cpu.h"
39			#include "machine.h"
40			#include "memory.h"
41			#include "misc.h"
42			#include "symbol.h"
43
44			#define DYNTRANS_32
45			#include "tmp_transputer_head.c"
46
47
48			static char *opcode_names[16] = TRANSPUTER_INSTRUCTIONS;
49	dpavlin	30	static char *opcode_f_names[N_TRANSPUTER_OPC_F_NAMES] = TRANSPUTER_OPC_F_NAMES;
50	dpavlin	28
51			/*
52			* transputer_cpu_new():
53			*
54			* Create a new TRANSPUTER cpu object.
55			*
56			* Returns 1 on success, 0 if there was no matching TRANSPUTER processor with
57			* this cpu_type_name.
58			*/
59			int transputer_cpu_new(struct cpu cpu, struct memory mem,
60			struct machine machine, int cpu_id, char cpu_type_name)
61			{
62			int i = 0;
63			struct transputer_cpu_type_def cpu_type_defs[] =
64			TRANSPUTER_CPU_TYPE_DEFS;
65
66			/* Scan the cpu_type_defs list for this cpu type: */
67			while (cpu_type_defs[i].name != NULL) {
68			if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) {
69			break;
70			}
71			i++;
72			}
73			if (cpu_type_defs[i].name == NULL)
74			return 0;
75
76			cpu->cd.transputer.cpu_type = cpu_type_defs[i];
77			cpu->name = cpu->cd.transputer.cpu_type.name;
78			cpu->byte_order = EMUL_LITTLE_ENDIAN;
79			cpu->is_32bit = 1;
80
81			if (cpu->cd.transputer.cpu_type.bits != 32) {
82			fatal("Only 32-bit Transputer processors can be "
83			"emulated. 16-bit mode is not supported. Sorry.\n");
84			exit(1);
85			}
86
87			cpu->run_instr = transputer_run_instr;
88			cpu->memory_rw = transputer_memory_rw;
89			cpu->update_translation_table = transputer_update_translation_table;
90			cpu->invalidate_translation_caches =
91			transputer_invalidate_translation_caches;
92			cpu->invalidate_code_translation =
93			transputer_invalidate_code_translation;
94
95			/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
96			if (cpu_id == 0) {
97			debug("%s", cpu->name);
98			}
99
100	dpavlin	30	cpu->cd.transputer.wptr = machine->physical_ram_in_mb * 1048576 - 2048;
101
102	dpavlin	28	return 1;
103			}
104
105
106			/*
107			* transputer_cpu_list_available_types():
108			*
109			* Print a list of available TRANSPUTER CPU types.
110			*/
111			void transputer_cpu_list_available_types(void)
112			{
113			int i = 0, j;
114			struct transputer_cpu_type_def tdefs[] = TRANSPUTER_CPU_TYPE_DEFS;
115
116			while (tdefs[i].name != NULL) {
117			debug("%s", tdefs[i].name);
118			for (j = 7 - strlen(tdefs[i].name); j > 0; j --)
119			debug(" ");
120			i ++;
121			if ((i % 8) == 0 \|\| tdefs[i].name == NULL)
122			debug("\n");
123			}
124			}
125
126
127			/*
128			* transputer_cpu_dumpinfo():
129			*/
130			void transputer_cpu_dumpinfo(struct cpu *cpu)
131			{
132			/* TODO */
133			debug("\n");
134			}
135
136
137			/*
138			* transputer_cpu_register_dump():
139			*
140			* Dump cpu registers in a relatively readable format.
141			*
142			* gprs: set to non-zero to dump GPRs and some special-purpose registers.
143			* coprocs: set bit 0..3 to dump registers in coproc 0..3.
144			*/
145			void transputer_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
146			{
147			char *symbol;
148			uint64_t offset;
149			int x = cpu->cpu_id;
150
151			symbol = get_symbol_name(&cpu->machine->symbol_context,
152			cpu->pc, &offset);
153
154			debug("cpu%i: wptr = 0x%08"PRIx32" oreg = 0x%08"PRIx32" ip = 0x%08"
155			PRIx32, x, cpu->cd.transputer.wptr, cpu->cd.transputer.oreg,
156			(uint32_t)cpu->pc);
157			debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
158
159			debug("cpu%i: a = 0x%08"PRIx32" b = 0x%08"PRIx32" c = 0x%08"
160			PRIx32"\n", x, cpu->cd.transputer.a, cpu->cd.transputer.b,
161			cpu->cd.transputer.c);
162
163			/* TODO: Error flags, Floating point registers, etc. */
164			}
165
166
167			/*
168			* transputer_cpu_register_match():
169			*/
170			void transputer_cpu_register_match(struct machine m, char name,
171			int writeflag, uint64_t valuep, int match_register)
172			{
173			int cpunr = 0;
174
175			/* CPU number: */
176			/* TODO */
177
178			/* Register name: */
179			if (strcasecmp(name, "pc") == 0) {
180			if (writeflag) {
181			m->cpus[cpunr]->pc = *valuep;
182			} else
183			*valuep = m->cpus[cpunr]->pc;
184			*match_register = 1;
185			}
186
187	dpavlin	30	if (strcasecmp(name, "a") == 0) {
188			if (writeflag) {
189			m->cpus[cpunr]->cd.transputer.a = *valuep;
190			} else
191			*valuep = m->cpus[cpunr]->cd.transputer.a;
192			*match_register = 1;
193			}
194
195			if (strcasecmp(name, "b") == 0) {
196			if (writeflag) {
197			m->cpus[cpunr]->cd.transputer.b = *valuep;
198			} else
199			*valuep = m->cpus[cpunr]->cd.transputer.b;
200			*match_register = 1;
201			}
202
203			if (strcasecmp(name, "c") == 0) {
204			if (writeflag) {
205			m->cpus[cpunr]->cd.transputer.c = *valuep;
206			} else
207			*valuep = m->cpus[cpunr]->cd.transputer.c;
208			*match_register = 1;
209			}
210
211			if (strcasecmp(name, "wptr") == 0) {
212			if (writeflag) {
213			m->cpus[cpunr]->cd.transputer.wptr = *valuep;
214			} else
215			*valuep = m->cpus[cpunr]->cd.transputer.wptr;
216			*match_register = 1;
217			}
218
219			if (strcasecmp(name, "oreg") == 0) {
220			if (writeflag) {
221			m->cpus[cpunr]->cd.transputer.oreg = *valuep;
222			} else
223			*valuep = m->cpus[cpunr]->cd.transputer.oreg;
224			*match_register = 1;
225			}
226
227			/* TODO: Front and back pointers, etc. */
228	dpavlin	28	}
229
230
231			/*
232			* transputer_cpu_tlbdump():
233			*
234			* Called from the debugger to dump the TLB in a readable format.
235			* x is the cpu number to dump, or -1 to dump all CPUs.
236			*
237			* If rawflag is nonzero, then the TLB contents isn't formated nicely,
238			* just dumped.
239			*/
240			void transputer_cpu_tlbdump(struct machine *m, int x, int rawflag)
241			{
242			}
243
244
245			/*
246			* transputer_cpu_gdb_stub():
247			*
248			* Execute a "remote GDB" command. Returns a newly allocated response string
249			* on success, NULL on failure.
250			*/
251			char transputer_cpu_gdb_stub(struct cpu cpu, char *cmd)
252			{
253			fatal("transputer_cpu_gdb_stub(): TODO\n");
254			return NULL;
255			}
256
257
258			/*
259			* transputer_cpu_interrupt():
260			*/
261			int transputer_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
262			{
263			fatal("transputer_cpu_interrupt(): TODO\n");
264			return 0;
265			}
266
267
268			/*
269			* transputer_cpu_interrupt_ack():
270			*/
271			int transputer_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
272			{
273			/* fatal("transputer_cpu_interrupt_ack(): TODO\n"); */
274			return 0;
275			}
276
277
278			/*
279			* transputer_cpu_disassemble_instr():
280			*
281			* Convert an instruction word into human readable format, for instruction
282			* tracing. On Transputers, an opcode is one byte, optionally followed by
283			* more instruction bytes.
284			*
285			* If running is 1, cpu->pc should be the address of the instruction.
286			*
287			* If running is 0, things that depend on the runtime environment (eg.
288			* register contents) will not be shown, and addr will be used instead of
289			* cpu->pc for relative addresses.
290			*/
291			int transputer_cpu_disassemble_instr(struct cpu cpu, unsigned char ib,
292			int running, uint64_t dumpaddr)
293			{
294			uint64_t offset;
295			char *symbol;
296			int opcode, operand;
297
298			if (running)
299			dumpaddr = cpu->pc;
300
301			symbol = get_symbol_name(&cpu->machine->symbol_context,
302			dumpaddr, &offset);
303			if (symbol != NULL && offset==0)
304			debug("<%s>\n", symbol);
305
306			if (cpu->machine->ncpus > 1 && running)
307			debug("cpu%i: ", cpu->cpu_id);
308
309			debug("0x%08x: ", (int)dumpaddr);
310
311			opcode = ib[0] >> 4;
312			operand = ib[0] & 15;
313	dpavlin	30	debug("%02x %-6s %2i", ib[0], opcode_names[opcode], operand);
314	dpavlin	28
315	dpavlin	30	/*
316			* For opcodes where it is nice to have additional runtime info,
317			* special cases need to be added here. (E.g. an instruction which
318			* updates registers can show the contents of the new registers
319			* after the update.)
320			*/
321	dpavlin	28
322	dpavlin	30	switch (opcode) {
323	dpavlin	28
324	dpavlin	30	case T_OPC_PFIX:
325			if (running) {
326			uint32_t oreg = cpu->cd.transputer.oreg \| operand;
327			debug("\toreg = 0x%"PRIx32, oreg << 4);
328			}
329			break;
330
331			case T_OPC_LDC:
332			if (running) {
333			uint32_t new_c = cpu->cd.transputer.b;
334			uint32_t new_b = cpu->cd.transputer.a;
335			uint32_t new_a = cpu->cd.transputer.oreg \| operand;
336			debug("\ta=0x%"PRIx32", b=0x%"PRIx32", c=0x%"PRIx32,
337			new_a, new_b, new_c);
338			}
339			break;
340
341			case T_OPC_STL:
342			if (running) {
343			uint32_t addr = (cpu->cd.transputer.oreg \| operand)
344			* sizeof(uint32_t) + cpu->cd.transputer.wptr;
345			debug("\t[0x%"PRIx32"] = 0x%x", addr,
346			cpu->cd.transputer.a);
347			}
348			break;
349
350			case T_OPC_OPR:
351			if (running) {
352			uint32_t fopcode = cpu->cd.transputer.oreg \| operand;
353			debug("\t");
354			if (fopcode < N_TRANSPUTER_OPC_F_NAMES)
355			debug("%s", opcode_f_names[fopcode]);
356			else
357			debug("0x%"PRIx32, fopcode);
358			}
359			break;
360
361	dpavlin	28	}
362
363	dpavlin	30	debug("\n");
364
365	dpavlin	28	return 1;
366			}
367
368
369			#include "tmp_transputer_tail.c"
370