/[gxemul]/trunk/src/cpus/cpu_sparc.c
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revision 41 by dpavlin, Mon Oct 8 16:21:53 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_sparc.c,v 1.44 2007/03/26 02:18:44 debug Exp $   *  $Id: cpu_sparc.c,v 1.46 2007/06/07 15:36:24 debug Exp $
29   *   *
30   *  SPARC CPU emulation.   *  SPARC CPU emulation.
31   */   */
# Line 41  Line 41 
41  #include "misc.h"  #include "misc.h"
42  #include "settings.h"  #include "settings.h"
43  #include "symbol.h"  #include "symbol.h"
44    #include "timer.h"
45    
46    
47  #define DYNTRANS_DUALMODE_32  #define DYNTRANS_DUALMODE_32
# Line 48  Line 49 
49  #include "tmp_sparc_head.c"  #include "tmp_sparc_head.c"
50    
51    
52    extern int native_code_translation_enabled;
53    
54  static char *sparc_regnames[N_SPARC_REG] = SPARC_REG_NAMES;  static char *sparc_regnames[N_SPARC_REG] = SPARC_REG_NAMES;
55  static char *sparc_pregnames[N_SPARC_PREG] = SPARC_PREG_NAMES;  static char *sparc_pregnames[N_SPARC_PREG] = SPARC_PREG_NAMES;
56  static char *sparc_regbranch_names[N_SPARC_REGBRANCH_TYPES] =  static char *sparc_regbranch_names[N_SPARC_REGBRANCH_TYPES] =
# Line 168  int sparc_cpu_new(struct cpu *cpu, struc Line 171  int sparc_cpu_new(struct cpu *cpu, struc
171                      cpu->cd.sparc.r[i]);                      cpu->cd.sparc.r[i]);
172          /*  TODO: Handler for writes to the zero register!  */          /*  TODO: Handler for writes to the zero register!  */
173    
174            if (native_code_translation_enabled)
175                    cpu->sampling_timer = timer_add(CPU_SAMPLE_TIMER_HZ,
176                        sparc_timer_sample_tick, cpu);
177    
178          return 1;          return 1;
179  }  }
180    
# Line 267  void sparc_cpu_register_dump(struct cpu Line 274  void sparc_cpu_register_dump(struct cpu
274                                          continue;                                          continue;
275                                  }                                  }
276                                  debug("%s=", sparc_regnames[i]);                                  debug("%s=", sparc_regnames[i]);
277                                  debug("0x%08x", (int) cpu->cd.sparc.r[i]);                                  debug("0x%08"PRIx32,
278                                        (uint32_t) cpu->cd.sparc.r[i]);
279                                  if ((i & 3) < 3)                                  if ((i & 3) < 3)
280                                          debug("  ");                                          debug("  ");
281                                  else                                  else
# Line 459  int sparc_cpu_disassemble_instr(struct c Line 467  int sparc_cpu_disassemble_instr(struct c
467          iword = *(uint32_t *)&instr[0];          iword = *(uint32_t *)&instr[0];
468          iword = BE32_TO_HOST(iword);          iword = BE32_TO_HOST(iword);
469    
470          debug(": %08x", iword);          debug(": %08"PRIx32, iword);
471    
472          if (running && cpu->delay_slot)          if (running && cpu->delay_slot)
473                  debug(" (d)");                  debug(" (d)");
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