1 |
/* |
/* |
2 |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
3 |
* |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_sparc.c,v 1.35 2006/07/23 12:40:24 debug Exp $ |
* $Id: cpu_sparc.c,v 1.42 2007/03/18 02:54:59 debug Exp $ |
29 |
* |
* |
30 |
* SPARC CPU emulation. |
* SPARC CPU emulation. |
31 |
*/ |
*/ |
39 |
#include "machine.h" |
#include "machine.h" |
40 |
#include "memory.h" |
#include "memory.h" |
41 |
#include "misc.h" |
#include "misc.h" |
42 |
|
#include "settings.h" |
43 |
#include "symbol.h" |
#include "symbol.h" |
44 |
|
|
45 |
|
|
91 |
|
|
92 |
cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot; |
cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot; |
93 |
|
|
94 |
|
/* TODO: Separate this into 64-bit vs 32-bit? */ |
95 |
|
cpu->translate_v2p = sparc_translate_v2p; |
96 |
|
|
97 |
if (cpu->is_32bit) { |
if (cpu->is_32bit) { |
98 |
cpu->run_instr = sparc32_run_instr; |
cpu->run_instr = sparc32_run_instr; |
99 |
cpu->update_translation_table = |
cpu->update_translation_table = |
139 |
cpu->cd.sparc.tick |= SPARC_TICK_NPT; |
cpu->cd.sparc.tick |= SPARC_TICK_NPT; |
140 |
|
|
141 |
/* Insert number of Windows and Trap levels into the version reg.: */ |
/* Insert number of Windows and Trap levels into the version reg.: */ |
142 |
cpu->cd.sparc.ver |= MAXWIN | (MAXTL << SPARC_VER_MAXTL_SHIFT); |
cpu->cd.sparc.ver |= N_REG_WINDOWS | (MAXTL << SPARC_VER_MAXTL_SHIFT); |
143 |
|
|
144 |
/* Misc. initial settings suitable for userland emulation: */ |
/* Misc. initial settings suitable for userland emulation: */ |
145 |
cpu->cd.sparc.cansave = cpu->cd.sparc.cpu_type.nwindows - 1; |
cpu->cd.sparc.cansave = cpu->cd.sparc.cpu_type.nwindows - 2; |
146 |
cpu->cd.sparc.cleanwin = cpu->cd.sparc.cpu_type.nwindows / 2; |
cpu->cd.sparc.canrestore = 0; |
147 |
|
cpu->cd.sparc.cleanwin = 1; |
148 |
|
cpu->cd.sparc.otherwin = 0; |
149 |
|
|
150 |
|
if (cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore |
151 |
|
+ cpu->cd.sparc.otherwin != cpu->cd.sparc.cpu_type.nwindows - 2) { |
152 |
|
fatal("Fatal internal error: inconsistent windowing " |
153 |
|
"parameters!\n"); |
154 |
|
exit(1); |
155 |
|
} |
156 |
|
|
157 |
if (cpu->cd.sparc.cpu_type.nwindows >= MAXWIN) { |
if (cpu->cd.sparc.cpu_type.nwindows > N_REG_WINDOWS) { |
158 |
fatal("Fatal internal error: nwindows = %1 is more than %i\n", |
fatal("Fatal internal error: nwindows = %1 is more than %i\n", |
159 |
cpu->cd.sparc.cpu_type.nwindows, MAXWIN); |
cpu->cd.sparc.cpu_type.nwindows, N_REG_WINDOWS); |
160 |
exit(1); |
exit(1); |
161 |
} |
} |
162 |
|
|
163 |
|
CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
164 |
|
CPU_SETTINGS_ADD_REGISTER64("y", cpu->cd.sparc.y); |
165 |
|
CPU_SETTINGS_ADD_REGISTER64("pstate", cpu->cd.sparc.pstate); |
166 |
|
for (i=0; i<N_SPARC_REG; i++) |
167 |
|
CPU_SETTINGS_ADD_REGISTER64(sparc_regnames[i], |
168 |
|
cpu->cd.sparc.r[i]); |
169 |
|
/* TODO: Handler for writes to the zero register! */ |
170 |
|
|
171 |
return 1; |
return 1; |
172 |
} |
} |
173 |
|
|
296 |
} |
} |
297 |
} |
} |
298 |
} |
} |
|
} |
|
299 |
|
|
300 |
|
if (coprocs & 1) { |
301 |
|
int sum; |
302 |
|
|
303 |
/* |
debug("cpu%i: cwp = 0x%02x\n", x, cpu->cd.sparc.cwp); |
304 |
* sparc_cpu_register_match(): |
debug("cpu%i: cansave = 0x%02x\n", x, cpu->cd.sparc.cansave); |
305 |
*/ |
debug("cpu%i: canrestore = 0x%02x\n", x, |
306 |
void sparc_cpu_register_match(struct machine *m, char *name, |
cpu->cd.sparc.canrestore); |
307 |
int writeflag, uint64_t *valuep, int *match_register) |
debug("cpu%i: otherwin = 0x%02x\n", x, |
308 |
{ |
cpu->cd.sparc.otherwin); |
309 |
int i, cpunr = 0; |
debug("cpu%i: cleanwin = 0x%02x\n", x, |
310 |
|
cpu->cd.sparc.cleanwin); |
311 |
|
|
312 |
|
sum = cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore + |
313 |
|
cpu->cd.sparc.otherwin; |
314 |
|
debug("cpu%i: cansave + canrestore + otherwin = %i + %i + %i" |
315 |
|
" = %i", x, cpu->cd.sparc.cansave, cpu->cd.sparc.canrestore, |
316 |
|
cpu->cd.sparc.otherwin, sum); |
317 |
|
if (sum == cpu->cd.sparc.cpu_type.nwindows - 2) |
318 |
|
debug(" (consistent)\n"); |
319 |
|
else |
320 |
|
debug(" (INCONSISTENT!)\n"); |
321 |
|
|
322 |
/* CPU number: */ |
debug("cpu%i: wstate: other = %i, normal = %i\n", |
323 |
/* TODO */ |
x, (cpu->cd.sparc.wstate & SPARC_WSTATE_OTHER_MASK) |
324 |
|
>> SPARC_WSTATE_OTHER_SHIFT, cpu->cd.sparc.wstate & |
325 |
|
SPARC_WSTATE_NORMAL_MASK); |
326 |
|
|
327 |
|
debug("cpu%i: asi = 0x%02x\n", x, cpu->cd.sparc.asi); |
328 |
|
debug("cpu%i: tl = 0x%02x\n", x, cpu->cd.sparc.tl); |
329 |
|
debug("cpu%i: pil = 0x%02x\n", x, cpu->cd.sparc.pil); |
330 |
|
|
331 |
|
for (i=0; i<MAXTL; i++) { |
332 |
|
debug("cpu%i: tpc[%i] = 0x", x, i); |
333 |
|
if (bits32) |
334 |
|
debug("%08"PRIx32"\n", |
335 |
|
(uint32_t) cpu->cd.sparc.tpc[i]); |
336 |
|
else |
337 |
|
debug("%016"PRIx64"\n", |
338 |
|
(uint64_t) cpu->cd.sparc.tpc[i]); |
339 |
|
|
340 |
for (i=0; i<N_SPARC_REG; i++) { |
debug("cpu%i: tnpc[%i] = 0x", x, i); |
341 |
if (strcasecmp(name, sparc_regnames[i]) == 0) { |
if (bits32) |
342 |
if (writeflag && i != SPARC_ZEROREG) |
debug("%08"PRIx32"\n", |
343 |
m->cpus[cpunr]->cd.sparc.r[i] = *valuep; |
(uint32_t) cpu->cd.sparc.tnpc[i]); |
344 |
else |
else |
345 |
*valuep = m->cpus[cpunr]->cd.sparc.r[i]; |
debug("%016"PRIx64"\n", |
346 |
*match_register = 1; |
(uint64_t) cpu->cd.sparc.tnpc[i]); |
|
} |
|
|
} |
|
347 |
|
|
348 |
if (strcasecmp(name, "pc") == 0) { |
debug("cpu%i: tstate[%i] = 0x", x, i); |
349 |
if (writeflag) { |
if (bits32) |
350 |
m->cpus[cpunr]->pc = *valuep; |
debug("%08"PRIx32"\n", |
351 |
} else { |
(uint32_t) cpu->cd.sparc.tstate[i]); |
352 |
*valuep = m->cpus[cpunr]->pc; |
else |
353 |
} |
debug("%016"PRIx64"\n", |
354 |
*match_register = 1; |
(uint64_t) cpu->cd.sparc.tstate[i]); |
|
} |
|
355 |
|
|
356 |
if (strcasecmp(name, "y") == 0) { |
debug("cpu%i: ttype[%i] = 0x"PRIx32"\n", |
357 |
if (writeflag) { |
x, i, cpu->cd.sparc.ttype[i]); |
|
m->cpus[cpunr]->cd.sparc.y = (uint32_t) *valuep; |
|
|
} else { |
|
|
*valuep = (uint32_t) m->cpus[cpunr]->cd.sparc.y; |
|
358 |
} |
} |
|
*match_register = 1; |
|
|
} |
|
359 |
|
|
360 |
if (*match_register && m->cpus[cpunr]->is_32bit) |
debug("cpu%i: tba = 0x", x); |
361 |
(*valuep) &= 0xffffffffULL; |
if (bits32) |
362 |
|
debug("%08"PRIx32"\n", (uint32_t) cpu->cd.sparc.tba); |
363 |
|
else |
364 |
|
debug("%016"PRIx64"\n", (uint64_t) cpu->cd.sparc.tba); |
365 |
|
} |
366 |
} |
} |
367 |
|
|
368 |
|
|
516 |
switch (op2) { |
switch (op2) { |
517 |
case 56:/* jump and link */ |
case 56:/* jump and link */ |
518 |
return 1; |
return 1; |
519 |
|
case 57:/* return */ |
520 |
|
return 1; |
521 |
} |
} |
522 |
break; |
break; |
523 |
} |
} |