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/* |
/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_sparc.c,v 1.31 2006/06/24 21:47:23 debug Exp $ |
* $Id: cpu_sparc.c,v 1.42 2007/03/18 02:54:59 debug Exp $ |
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* |
* |
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* SPARC CPU emulation. |
* SPARC CPU emulation. |
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*/ |
*/ |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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#include "settings.h" |
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#include "symbol.h" |
#include "symbol.h" |
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cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot; |
cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot; |
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|
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/* TODO: Separate this into 64-bit vs 32-bit? */ |
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cpu->translate_v2p = sparc_translate_v2p; |
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|
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if (cpu->is_32bit) { |
if (cpu->is_32bit) { |
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cpu->run_instr = sparc32_run_instr; |
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cpu->update_translation_table = |
cpu->update_translation_table = |
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sparc32_update_translation_table; |
sparc32_update_translation_table; |
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cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
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cpu->invalidate_code_translation = |
cpu->invalidate_code_translation = |
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sparc32_invalidate_code_translation; |
sparc32_invalidate_code_translation; |
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} else { |
} else { |
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cpu->run_instr = sparc_run_instr; |
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cpu->update_translation_table = sparc_update_translation_table; |
cpu->update_translation_table = sparc_update_translation_table; |
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cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
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sparc_invalidate_translation_caches; |
sparc_invalidate_translation_caches; |
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cpu->cd.sparc.tick |= SPARC_TICK_NPT; |
cpu->cd.sparc.tick |= SPARC_TICK_NPT; |
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|
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/* Insert number of Windows and Trap levels into the version reg.: */ |
/* Insert number of Windows and Trap levels into the version reg.: */ |
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cpu->cd.sparc.ver |= MAXWIN | (MAXTL << SPARC_VER_MAXTL_SHIFT); |
cpu->cd.sparc.ver |= N_REG_WINDOWS | (MAXTL << SPARC_VER_MAXTL_SHIFT); |
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|
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/* Misc. initial settings suitable for userland emulation: */ |
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cpu->cd.sparc.cansave = cpu->cd.sparc.cpu_type.nwindows - 2; |
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cpu->cd.sparc.canrestore = 0; |
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cpu->cd.sparc.cleanwin = 1; |
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cpu->cd.sparc.otherwin = 0; |
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|
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if (cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore |
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+ cpu->cd.sparc.otherwin != cpu->cd.sparc.cpu_type.nwindows - 2) { |
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fatal("Fatal internal error: inconsistent windowing " |
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"parameters!\n"); |
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exit(1); |
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} |
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if (cpu->cd.sparc.cpu_type.nwindows > N_REG_WINDOWS) { |
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fatal("Fatal internal error: nwindows = %1 is more than %i\n", |
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cpu->cd.sparc.cpu_type.nwindows, N_REG_WINDOWS); |
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exit(1); |
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} |
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CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
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CPU_SETTINGS_ADD_REGISTER64("y", cpu->cd.sparc.y); |
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CPU_SETTINGS_ADD_REGISTER64("pstate", cpu->cd.sparc.pstate); |
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for (i=0; i<N_SPARC_REG; i++) |
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CPU_SETTINGS_ADD_REGISTER64(sparc_regnames[i], |
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cpu->cd.sparc.r[i]); |
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/* TODO: Handler for writes to the zero register! */ |
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return 1; |
return 1; |
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} |
} |
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} |
} |
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} |
} |
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} |
} |
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} |
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if (coprocs & 1) { |
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int sum; |
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/* |
debug("cpu%i: cwp = 0x%02x\n", x, cpu->cd.sparc.cwp); |
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* sparc_cpu_register_match(): |
debug("cpu%i: cansave = 0x%02x\n", x, cpu->cd.sparc.cansave); |
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*/ |
debug("cpu%i: canrestore = 0x%02x\n", x, |
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void sparc_cpu_register_match(struct machine *m, char *name, |
cpu->cd.sparc.canrestore); |
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int writeflag, uint64_t *valuep, int *match_register) |
debug("cpu%i: otherwin = 0x%02x\n", x, |
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{ |
cpu->cd.sparc.otherwin); |
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int i, cpunr = 0; |
debug("cpu%i: cleanwin = 0x%02x\n", x, |
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cpu->cd.sparc.cleanwin); |
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sum = cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore + |
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cpu->cd.sparc.otherwin; |
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debug("cpu%i: cansave + canrestore + otherwin = %i + %i + %i" |
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" = %i", x, cpu->cd.sparc.cansave, cpu->cd.sparc.canrestore, |
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cpu->cd.sparc.otherwin, sum); |
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if (sum == cpu->cd.sparc.cpu_type.nwindows - 2) |
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debug(" (consistent)\n"); |
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else |
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debug(" (INCONSISTENT!)\n"); |
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|
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/* CPU number: */ |
debug("cpu%i: wstate: other = %i, normal = %i\n", |
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/* TODO */ |
x, (cpu->cd.sparc.wstate & SPARC_WSTATE_OTHER_MASK) |
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>> SPARC_WSTATE_OTHER_SHIFT, cpu->cd.sparc.wstate & |
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SPARC_WSTATE_NORMAL_MASK); |
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debug("cpu%i: asi = 0x%02x\n", x, cpu->cd.sparc.asi); |
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debug("cpu%i: tl = 0x%02x\n", x, cpu->cd.sparc.tl); |
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debug("cpu%i: pil = 0x%02x\n", x, cpu->cd.sparc.pil); |
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for (i=0; i<MAXTL; i++) { |
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debug("cpu%i: tpc[%i] = 0x", x, i); |
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if (bits32) |
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debug("%08"PRIx32"\n", |
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(uint32_t) cpu->cd.sparc.tpc[i]); |
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else |
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debug("%016"PRIx64"\n", |
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(uint64_t) cpu->cd.sparc.tpc[i]); |
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|
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for (i=0; i<N_SPARC_REG; i++) { |
debug("cpu%i: tnpc[%i] = 0x", x, i); |
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if (strcasecmp(name, sparc_regnames[i]) == 0) { |
if (bits32) |
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if (writeflag && i != SPARC_ZEROREG) |
debug("%08"PRIx32"\n", |
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m->cpus[cpunr]->cd.sparc.r[i] = *valuep; |
(uint32_t) cpu->cd.sparc.tnpc[i]); |
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else |
else |
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*valuep = m->cpus[cpunr]->cd.sparc.r[i]; |
debug("%016"PRIx64"\n", |
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*match_register = 1; |
(uint64_t) cpu->cd.sparc.tnpc[i]); |
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} |
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} |
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if (strcasecmp(name, "pc") == 0) { |
debug("cpu%i: tstate[%i] = 0x", x, i); |
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if (writeflag) { |
if (bits32) |
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m->cpus[cpunr]->pc = *valuep; |
debug("%08"PRIx32"\n", |
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} else { |
(uint32_t) cpu->cd.sparc.tstate[i]); |
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*valuep = m->cpus[cpunr]->pc; |
else |
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} |
debug("%016"PRIx64"\n", |
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*match_register = 1; |
(uint64_t) cpu->cd.sparc.tstate[i]); |
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} |
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if (strcasecmp(name, "y") == 0) { |
debug("cpu%i: ttype[%i] = 0x"PRIx32"\n", |
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if (writeflag) { |
x, i, cpu->cd.sparc.ttype[i]); |
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m->cpus[cpunr]->cd.sparc.y = (uint32_t) *valuep; |
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} else { |
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*valuep = (uint32_t) m->cpus[cpunr]->cd.sparc.y; |
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} |
} |
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*match_register = 1; |
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} |
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if (*match_register && m->cpus[cpunr]->is_32bit) |
debug("cpu%i: tba = 0x", x); |
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(*valuep) &= 0xffffffffULL; |
if (bits32) |
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debug("%08"PRIx32"\n", (uint32_t) cpu->cd.sparc.tba); |
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else |
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debug("%016"PRIx64"\n", (uint64_t) cpu->cd.sparc.tba); |
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} |
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} |
} |
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|
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switch (op2) { |
switch (op2) { |
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case 56:/* jump and link */ |
case 56:/* jump and link */ |
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return 1; |
return 1; |
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case 57:/* return */ |
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return 1; |
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} |
} |
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break; |
break; |
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} |
} |
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case 41:rs_name = "psr"; |
case 41:rs_name = "psr"; |
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no_rs2 = 1; |
no_rs2 = 1; |
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break; |
break; |
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case 42:rs_name = "wim"; |
case 42:/* TODO: something with wim only, on sparc v8? */ |
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rs_name = sparc_pregnames[rs1]; |
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no_rs2 = 1; |
no_rs2 = 1; |
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break; |
break; |
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case 43:/* ? */ |
case 43:/* ? */ |
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if ((iword >> 13) & 1) { |
if ((iword >> 13) & 1) { |
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if (siconst >= -9 && siconst <= 9) |
if (siconst >= -9 && siconst <= 9) |
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debug("%i", siconst); |
debug("%i", siconst); |
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else if (siconst < 0 && (op2 == 0 || |
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op2 == 4 || op2 == 20 || op2 == 60)) |
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debug("-0x%x", -siconst); |
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else |
else |
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debug("0x%x", siconst); |
debug("0x%x", siconst); |
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} else { |
} else { |
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debug("%%%s", rd_name); |
debug("%%%s", rd_name); |
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break; |
break; |
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|
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case 3: debug("%s\t", sparc_loadstore_names[op2]); |
case 3: mnem = sparc_loadstore_names[op2]; |
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switch (op2) { |
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case 0: /* 'lduw' was called only 'ld' in pre-v9 */ |
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if (cpu->cd.sparc.cpu_type.v < 9) |
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mnem = "ld"; |
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break; |
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} |
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debug("%s\t", mnem); |
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if (op2 & 4) |
if (op2 & 4) |
820 |
debug("%%%s,", sparc_regnames[rd]); |
debug("%%%s,", sparc_regnames[rd]); |
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debug("[%%%s", sparc_regnames[rs1]); |
debug("[%%%s", sparc_regnames[rs1]); |
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debug("+%%%s", sparc_regnames[rs2]); |
debug("+%%%s", sparc_regnames[rs2]); |
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} |
} |
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debug("]"); |
debug("]"); |
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if (asi != 0) |
if ((op2 & 0x30) == 0x10) |
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debug("(%i)", asi); |
debug("(%i)", asi); |
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if (!(op2 & 4)) |
if (!(op2 & 4)) |
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debug(",%%%s", sparc_regnames[rd]); |
debug(",%%%s", sparc_regnames[rd]); |