--- trunk/src/cpus/cpu_sparc.c 2007/10/08 16:19:56 24 +++ trunk/src/cpus/cpu_sparc.c 2007/10/08 16:22:32 42 @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005-2006 Anders Gavare. All rights reserved. + * Copyright (C) 2005-2007 Anders Gavare. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_sparc.c,v 1.30 2006/06/16 18:31:26 debug Exp $ + * $Id: cpu_sparc.c,v 1.46 2007/06/07 15:36:24 debug Exp $ * * SPARC CPU emulation. */ @@ -39,7 +39,9 @@ #include "machine.h" #include "memory.h" #include "misc.h" +#include "settings.h" #include "symbol.h" +#include "timer.h" #define DYNTRANS_DUALMODE_32 @@ -47,6 +49,8 @@ #include "tmp_sparc_head.c" +extern int native_code_translation_enabled; + static char *sparc_regnames[N_SPARC_REG] = SPARC_REG_NAMES; static char *sparc_pregnames[N_SPARC_PREG] = SPARC_PREG_NAMES; static char *sparc_regbranch_names[N_SPARC_REGBRANCH_TYPES] = @@ -90,7 +94,11 @@ cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot; + /* TODO: Separate this into 64-bit vs 32-bit? */ + cpu->translate_v2p = sparc_translate_v2p; + if (cpu->is_32bit) { + cpu->run_instr = sparc32_run_instr; cpu->update_translation_table = sparc32_update_translation_table; cpu->invalidate_translation_caches = @@ -98,6 +106,7 @@ cpu->invalidate_code_translation = sparc32_invalidate_code_translation; } else { + cpu->run_instr = sparc_run_instr; cpu->update_translation_table = sparc_update_translation_table; cpu->invalidate_translation_caches = sparc_invalidate_translation_caches; @@ -133,9 +142,38 @@ cpu->cd.sparc.tick |= SPARC_TICK_NPT; /* Insert number of Windows and Trap levels into the version reg.: */ - cpu->cd.sparc.ver |= MAXWIN | (MAXTL << SPARC_VER_MAXTL_SHIFT); + cpu->cd.sparc.ver |= N_REG_WINDOWS | (MAXTL << SPARC_VER_MAXTL_SHIFT); - sparc_init_64bit_dummy_tables(cpu); + /* Misc. initial settings suitable for userland emulation: */ + cpu->cd.sparc.cansave = cpu->cd.sparc.cpu_type.nwindows - 2; + cpu->cd.sparc.canrestore = 0; + cpu->cd.sparc.cleanwin = 1; + cpu->cd.sparc.otherwin = 0; + + if (cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore + + cpu->cd.sparc.otherwin != cpu->cd.sparc.cpu_type.nwindows - 2) { + fatal("Fatal internal error: inconsistent windowing " + "parameters!\n"); + exit(1); + } + + if (cpu->cd.sparc.cpu_type.nwindows > N_REG_WINDOWS) { + fatal("Fatal internal error: nwindows = %1 is more than %i\n", + cpu->cd.sparc.cpu_type.nwindows, N_REG_WINDOWS); + exit(1); + } + + CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); + CPU_SETTINGS_ADD_REGISTER64("y", cpu->cd.sparc.y); + CPU_SETTINGS_ADD_REGISTER64("pstate", cpu->cd.sparc.pstate); + for (i=0; icd.sparc.r[i]); + /* TODO: Handler for writes to the zero register! */ + + if (native_code_translation_enabled) + cpu->sampling_timer = timer_add(CPU_SAMPLE_TIMER_HZ, + sparc_timer_sample_tick, cpu); return 1; } @@ -236,7 +274,8 @@ continue; } debug("%s=", sparc_regnames[i]); - debug("0x%08x", (int) cpu->cd.sparc.r[i]); + debug("0x%08"PRIx32, + (uint32_t) cpu->cd.sparc.r[i]); if ((i & 3) < 3) debug(" "); else @@ -265,50 +304,73 @@ } } } -} + if (coprocs & 1) { + int sum; -/* - * sparc_cpu_register_match(): - */ -void sparc_cpu_register_match(struct machine *m, char *name, - int writeflag, uint64_t *valuep, int *match_register) -{ - int i, cpunr = 0; + debug("cpu%i: cwp = 0x%02x\n", x, cpu->cd.sparc.cwp); + debug("cpu%i: cansave = 0x%02x\n", x, cpu->cd.sparc.cansave); + debug("cpu%i: canrestore = 0x%02x\n", x, + cpu->cd.sparc.canrestore); + debug("cpu%i: otherwin = 0x%02x\n", x, + cpu->cd.sparc.otherwin); + debug("cpu%i: cleanwin = 0x%02x\n", x, + cpu->cd.sparc.cleanwin); + + sum = cpu->cd.sparc.cansave + cpu->cd.sparc.canrestore + + cpu->cd.sparc.otherwin; + debug("cpu%i: cansave + canrestore + otherwin = %i + %i + %i" + " = %i", x, cpu->cd.sparc.cansave, cpu->cd.sparc.canrestore, + cpu->cd.sparc.otherwin, sum); + if (sum == cpu->cd.sparc.cpu_type.nwindows - 2) + debug(" (consistent)\n"); + else + debug(" (INCONSISTENT!)\n"); - /* CPU number: */ - /* TODO */ + debug("cpu%i: wstate: other = %i, normal = %i\n", + x, (cpu->cd.sparc.wstate & SPARC_WSTATE_OTHER_MASK) + >> SPARC_WSTATE_OTHER_SHIFT, cpu->cd.sparc.wstate & + SPARC_WSTATE_NORMAL_MASK); + + debug("cpu%i: asi = 0x%02x\n", x, cpu->cd.sparc.asi); + debug("cpu%i: tl = 0x%02x\n", x, cpu->cd.sparc.tl); + debug("cpu%i: pil = 0x%02x\n", x, cpu->cd.sparc.pil); + + for (i=0; icd.sparc.tpc[i]); + else + debug("%016"PRIx64"\n", + (uint64_t) cpu->cd.sparc.tpc[i]); - for (i=0; icpus[cpunr]->cd.sparc.r[i] = *valuep; + debug("cpu%i: tnpc[%i] = 0x", x, i); + if (bits32) + debug("%08"PRIx32"\n", + (uint32_t) cpu->cd.sparc.tnpc[i]); else - *valuep = m->cpus[cpunr]->cd.sparc.r[i]; - *match_register = 1; - } - } + debug("%016"PRIx64"\n", + (uint64_t) cpu->cd.sparc.tnpc[i]); - if (strcasecmp(name, "pc") == 0) { - if (writeflag) { - m->cpus[cpunr]->pc = *valuep; - } else { - *valuep = m->cpus[cpunr]->pc; - } - *match_register = 1; - } + debug("cpu%i: tstate[%i] = 0x", x, i); + if (bits32) + debug("%08"PRIx32"\n", + (uint32_t) cpu->cd.sparc.tstate[i]); + else + debug("%016"PRIx64"\n", + (uint64_t) cpu->cd.sparc.tstate[i]); - if (strcasecmp(name, "y") == 0) { - if (writeflag) { - m->cpus[cpunr]->cd.sparc.y = (uint32_t) *valuep; - } else { - *valuep = (uint32_t) m->cpus[cpunr]->cd.sparc.y; + debug("cpu%i: ttype[%i] = 0x"PRIx32"\n", + x, i, cpu->cd.sparc.ttype[i]); } - *match_register = 1; - } - if (*match_register && m->cpus[cpunr]->is_32bit) - (*valuep) &= 0xffffffffULL; + debug("cpu%i: tba = 0x", x); + if (bits32) + debug("%08"PRIx32"\n", (uint32_t) cpu->cd.sparc.tba); + else + debug("%016"PRIx64"\n", (uint64_t) cpu->cd.sparc.tba); + } } @@ -326,113 +388,6 @@ } -static void add_response_word(struct cpu *cpu, char *r, uint64_t value, - size_t maxlen, int len) -{ - char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64; - if (len == 4) - value &= 0xffffffffULL; - if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { - if (len == 4) { - value = ((value & 0xff) << 24) + - ((value & 0xff00) << 8) + - ((value & 0xff0000) >> 8) + - ((value & 0xff000000) >> 24); - } else { - value = ((value & 0xff) << 56) + - ((value & 0xff00) << 40) + - ((value & 0xff0000) << 24) + - ((value & 0xff000000ULL) << 8) + - ((value & 0xff00000000ULL) >> 8) + - ((value & 0xff0000000000ULL) >> 24) + - ((value & 0xff000000000000ULL) >> 40) + - ((value & 0xff00000000000000ULL) >> 56); - } - } - snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value); -} - - -/* - * sparc_cpu_gdb_stub(): - * - * Execute a "remote GDB" command. Returns a newly allocated response string - * on success, NULL on failure. - */ -char *sparc_cpu_gdb_stub(struct cpu *cpu, char *cmd) -{ - if (strcmp(cmd, "g") == 0) { - int i; - char *r; - size_t wlen = cpu->is_32bit? - sizeof(uint32_t) : sizeof(uint64_t); - size_t len = 1 + 76 * wlen; - r = malloc(len); - if (r == NULL) { - fprintf(stderr, "out of memory\n"); - exit(1); - } - r[0] = '\0'; - /* TODO */ - for (i=0; i<128; i++) - add_response_word(cpu, r, i, len, wlen); - return r; - } - - if (cmd[0] == 'p') { - int regnr = strtol(cmd + 1, NULL, 16); - size_t wlen = sizeof(uint32_t); - /* TODO: cpu->is_32bit? sizeof(uint32_t) : sizeof(uint64_t); */ - size_t len = 2 * wlen + 1; - char *r = malloc(len); - r[0] = '\0'; - if (regnr >= 0 && regnr < N_SPARC_REG) { - add_response_word(cpu, r, - cpu->cd.sparc.r[regnr], len, wlen); - } else if (regnr == 0x44) { - add_response_word(cpu, r, cpu->pc, len, wlen); -/* TODO: -20..3f = f0..f31 -40 = y -41 = psr -42 = wim -43 = tbr -45 = npc -46 = fsr -47 = csr -*/ - } else { - /* Unimplemented: */ - add_response_word(cpu, r, 0xcc000 + regnr, len, wlen); - } - return r; - } - - fatal("sparc_cpu_gdb_stub(): TODO\n"); - return NULL; -} - - -/* - * sparc_cpu_interrupt(): - */ -int sparc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) -{ - fatal("sparc_cpu_interrupt(): TODO\n"); - return 0; -} - - -/* - * sparc_cpu_interrupt_ack(): - */ -int sparc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) -{ - /* fatal("sparc_cpu_interrupt_ack(): TODO\n"); */ - return 0; -} - - /* * sparc_cpu_instruction_has_delayslot(): * @@ -462,6 +417,8 @@ switch (op2) { case 56:/* jump and link */ return 1; + case 57:/* return */ + return 1; } break; } @@ -510,7 +467,7 @@ iword = *(uint32_t *)&instr[0]; iword = BE32_TO_HOST(iword); - debug(": %08x", iword); + debug(": %08"PRIx32, iword); if (running && cpu->delay_slot) debug(" (d)"); @@ -665,7 +622,8 @@ case 41:rs_name = "psr"; no_rs2 = 1; break; - case 42:rs_name = "wim"; + case 42:/* TODO: something with wim only, on sparc v8? */ + rs_name = sparc_pregnames[rs1]; no_rs2 = 1; break; case 43:/* ? */ @@ -736,6 +694,9 @@ if ((iword >> 13) & 1) { if (siconst >= -9 && siconst <= 9) debug("%i", siconst); + else if (siconst < 0 && (op2 == 0 || + op2 == 4 || op2 == 20 || op2 == 60)) + debug("-0x%x", -siconst); else debug("0x%x", siconst); } else { @@ -748,7 +709,14 @@ debug("%%%s", rd_name); break; - case 3: debug("%s\t", sparc_loadstore_names[op2]); + case 3: mnem = sparc_loadstore_names[op2]; + switch (op2) { + case 0: /* 'lduw' was called only 'ld' in pre-v9 */ + if (cpu->cd.sparc.cpu_type.v < 9) + mnem = "ld"; + break; + } + debug("%s\t", mnem); if (op2 & 4) debug("%%%s,", sparc_regnames[rd]); debug("[%%%s", sparc_regnames[rs1]); @@ -762,7 +730,7 @@ debug("+%%%s", sparc_regnames[rs2]); } debug("]"); - if (asi != 0) + if ((op2 & 0x30) == 0x10) debug("(%i)", asi); if (!(op2 & 4)) debug(",%%%s", sparc_regnames[rd]);