--- trunk/src/cpus/cpu_sparc.c	2007/10/08 16:20:10	26
+++ trunk/src/cpus/cpu_sparc.c	2007/10/08 16:20:58	32
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_sparc.c,v 1.31 2006/06/24 21:47:23 debug Exp $
+ *  $Id: cpu_sparc.c,v 1.38 2006/09/19 10:50:08 debug Exp $
  *
  *  SPARC CPU emulation.
  */
@@ -39,6 +39,7 @@
 #include "machine.h"
 #include "memory.h"
 #include "misc.h"
+#include "settings.h"
 #include "symbol.h"
 
 
@@ -90,7 +91,11 @@
 
 	cpu->instruction_has_delayslot = sparc_cpu_instruction_has_delayslot;
 
+	/*  TODO: Separate this into 64-bit vs 32-bit?  */
+	cpu->translate_v2p = sparc_translate_v2p;
+
 	if (cpu->is_32bit) {
+		cpu->run_instr = sparc32_run_instr;
 		cpu->update_translation_table =
 		    sparc32_update_translation_table;
 		cpu->invalidate_translation_caches =
@@ -98,6 +103,7 @@
 		cpu->invalidate_code_translation =
 		    sparc32_invalidate_code_translation;
 	} else {
+		cpu->run_instr = sparc_run_instr;
 		cpu->update_translation_table = sparc_update_translation_table;
 		cpu->invalidate_translation_caches =
 		    sparc_invalidate_translation_caches;
@@ -135,6 +141,24 @@
 	/*  Insert number of Windows and Trap levels into the version reg.:  */
 	cpu->cd.sparc.ver |= MAXWIN | (MAXTL << SPARC_VER_MAXTL_SHIFT);
 
+	/*  Misc. initial settings suitable for userland emulation:  */
+	cpu->cd.sparc.cansave = cpu->cd.sparc.cpu_type.nwindows - 1;
+	cpu->cd.sparc.cleanwin = cpu->cd.sparc.cpu_type.nwindows / 2;
+
+	if (cpu->cd.sparc.cpu_type.nwindows >= MAXWIN) {
+		fatal("Fatal internal error: nwindows = %1 is more than %i\n",
+		    cpu->cd.sparc.cpu_type.nwindows, MAXWIN);
+		exit(1);
+	}
+
+	CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc);
+	CPU_SETTINGS_ADD_REGISTER64("y", cpu->cd.sparc.y);
+	CPU_SETTINGS_ADD_REGISTER64("pstate", cpu->cd.sparc.pstate);
+	for (i=0; i<N_SPARC_REG; i++)
+		CPU_SETTINGS_ADD_REGISTER64(sparc_regnames[i],
+		    cpu->cd.sparc.r[i]);
+	/*  TODO: Handler for writes to the zero register!  */
+
 	return 1;
 }
 
@@ -267,50 +291,6 @@
 
 
 /*
- *  sparc_cpu_register_match():
- */
-void sparc_cpu_register_match(struct machine *m, char *name,
-	int writeflag, uint64_t *valuep, int *match_register)
-{
-	int i, cpunr = 0;
-
-	/*  CPU number:  */
-	/*  TODO  */
-
-	for (i=0; i<N_SPARC_REG; i++) {
-		if (strcasecmp(name, sparc_regnames[i]) == 0) {
-			if (writeflag && i != SPARC_ZEROREG)
-				m->cpus[cpunr]->cd.sparc.r[i] = *valuep;
-			else
-				*valuep = m->cpus[cpunr]->cd.sparc.r[i];
-			*match_register = 1;
-		}
-	}
-
-	if (strcasecmp(name, "pc") == 0) {
-		if (writeflag) {
-			m->cpus[cpunr]->pc = *valuep;
-		} else {
-			*valuep = m->cpus[cpunr]->pc;
-		}
-		*match_register = 1;
-	}
-
-	if (strcasecmp(name, "y") == 0) {
-		if (writeflag) {
-			m->cpus[cpunr]->cd.sparc.y = (uint32_t) *valuep;
-		} else {
-			*valuep = (uint32_t) m->cpus[cpunr]->cd.sparc.y;
-		}
-		*match_register = 1;
-	}
-
-	if (*match_register && m->cpus[cpunr]->is_32bit)
-		(*valuep) &= 0xffffffffULL;
-}
-
-
-/*
  *  sparc_cpu_tlbdump():
  *
  *  Called from the debugger to dump the TLB in a readable format.
@@ -460,6 +440,8 @@
 		switch (op2) {
 		case 56:/*  jump and link  */
 			return 1;
+		case 57:/*  return  */
+			return 1;
 		}
 		break;
 	}
@@ -663,7 +645,8 @@
 		case 41:rs_name = "psr";
 			no_rs2 = 1;
 			break;
-		case 42:rs_name = "wim";
+		case 42:/*  TODO: something with wim only, on sparc v8?  */
+			rs_name = sparc_pregnames[rs1];
 			no_rs2 = 1;
 			break;
 		case 43:/*  ?  */
@@ -734,6 +717,9 @@
 			if ((iword >> 13) & 1) {
 				if (siconst >= -9 && siconst <= 9)
 					debug("%i", siconst);
+				else if (siconst < 0 && (op2 == 0 ||
+				    op2 == 4 || op2 == 20 || op2 == 60))
+					debug("-0x%x", -siconst);
 				else
 					debug("0x%x", siconst);
 			} else {
@@ -746,7 +732,14 @@
 			debug("%%%s", rd_name);
 		break;
 
-	case 3:	debug("%s\t", sparc_loadstore_names[op2]);
+	case 3:	mnem = sparc_loadstore_names[op2];
+		switch (op2) {
+		case 0:	/*  'lduw' was called only 'ld' in pre-v9  */
+			if (cpu->cd.sparc.cpu_type.v < 9)
+				mnem = "ld";
+			break;
+		}
+		debug("%s\t", mnem);
 		if (op2 & 4)
 			debug("%%%s,", sparc_regnames[rd]);
 		debug("[%%%s", sparc_regnames[rs1]);
@@ -760,7 +753,7 @@
 				debug("+%%%s", sparc_regnames[rs2]);
 		}
 		debug("]");
-		if (asi != 0)
+		if ((op2 & 0x30) == 0x10)
 			debug("(%i)", asi);
 		if (!(op2 & 4))
 			debug(",%%%s", sparc_regnames[rd]);