src/cpus/cpu_sparc.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_sparc.c,v 1.2 2005/10/22 17:24:21 debug Exp $
 *
 *  SPARC CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "symbol.h"

#define DYNTRANS_DUALMODE_32
/*  #define DYNTRANS_32  */
#include "tmp_sparc_head.c"


/*
 *  sparc_cpu_new():
 *
 *  Create a new SPARC cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching SPARC processor with
 *  this cpu_type_name.
 */
int sparc_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
        int cpu_id, char *cpu_type_name)
{
        if (strcasecmp(cpu_type_name, "SPARCv9") != 0)
                return 0;

        cpu->memory_rw = sparc_memory_rw;
        cpu->update_translation_table = sparc_update_translation_table;
        cpu->invalidate_translation_caches =
            sparc_invalidate_translation_caches;
        cpu->invalidate_code_translation =
            sparc_invalidate_code_translation;

        cpu->byte_order = EMUL_BIG_ENDIAN;
        cpu->is_32bit = 0;

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        return 1;
}


/*
 *  sparc_cpu_list_available_types():
 *
 *  Print a list of available SPARC CPU types.
 */
void sparc_cpu_list_available_types(void)
{
        debug("SPARCv9\n");
        /*  TODO  */
}


/*
 *  sparc_cpu_dumpinfo():
 */
void sparc_cpu_dumpinfo(struct cpu *cpu)
{
        debug("\n");
        /*  TODO  */
}


/*
 *  sparc_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void sparc_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset, tmp;
        int i, x = cpu->cpu_id;
        int bits32 = 0;

        if (gprs) {
                /*  Special registers (pc, ...) first:  */
                symbol = get_symbol_name(&cpu->machine->symbol_context,
                    cpu->pc, &offset);

                debug("cpu%i: pc  = 0x", x);
                if (bits32)
                        debug("%08x", (int)cpu->pc);
                else
                        debug("%016llx", (long long)cpu->pc);
                debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");

                /*  TODO  */
        }
}


/*
 *  sparc_cpu_register_match():
 */
void sparc_cpu_register_match(struct machine *m, char *name,
        int writeflag, uint64_t *valuep, int *match_register)
{
        int cpunr = 0;

        /*  CPU number:  */

        /*  TODO  */

        /*  Register name:  */
        if (strcasecmp(name, "pc") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->pc = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->pc;
                *match_register = 1;
        }
}


/*
 *  sparc_cpu_show_full_statistics():
 *
 *  Show detailed statistics on opcode usage on each cpu.
 */
void sparc_cpu_show_full_statistics(struct machine *m)
{
        fatal("sparc_cpu_show_full_statistics(): TODO\n");
}


/*
 *  sparc_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void sparc_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
        fatal("sparc_cpu_tlbdump(): TODO\n");
}


/*
 *  sparc_cpu_interrupt():
 */
int sparc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
{
        fatal("sparc_cpu_interrupt(): TODO\n");
        return 0;
}


/*
 *  sparc_cpu_interrupt_ack():
 */
int sparc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
{
        /*  fatal("sparc_cpu_interrupt_ack(): TODO\n");  */
        return 0;
}


/*
 *  sparc_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int sparc_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr,
        int running, uint64_t dumpaddr, int bintrans)
{
        uint64_t offset, addr;
        uint32_t iword;
        int hi6;
        char *symbol, *mnem = "ERROR";

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

/*      if (cpu->cd.sparc.bits == 32)
                debug("%08x", (int)dumpaddr);
        else
*/              debug("%016llx", (long long)dumpaddr);

        iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8)
            + instr[3];

        debug(": %08x\t", iword);

        /*
         *  Decode the instruction:
         */

        hi6 = iword >> 26;

        switch (hi6) {
        default:
                /*  TODO  */
                debug("unimplemented hi6 = 0x%02x", hi6);
        }

        debug("\n");
        return sizeof(iword);
}


#include "tmp_sparc_tail.c"

1	dpavlin	14	/*
2			* Copyright (C) 2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	18	* $Id: cpu_sparc.c,v 1.2 2005/10/22 17:24:21 debug Exp $
29	dpavlin	14	*
30			* SPARC CPU emulation.
31			*/
32
33			#include <stdio.h>
34			#include <stdlib.h>
35			#include <string.h>
36			#include <ctype.h>
37
38			#include "cpu.h"
39			#include "machine.h"
40			#include "memory.h"
41			#include "misc.h"
42			#include "symbol.h"
43
44			#define DYNTRANS_DUALMODE_32
45			/* #define DYNTRANS_32 */
46			#include "tmp_sparc_head.c"
47
48
49			/*
50			* sparc_cpu_new():
51			*
52			* Create a new SPARC cpu object.
53			*
54			* Returns 1 on success, 0 if there was no matching SPARC processor with
55			* this cpu_type_name.
56			*/
57			int sparc_cpu_new(struct cpu cpu, struct memory mem, struct machine *machine,
58			int cpu_id, char *cpu_type_name)
59			{
60			if (strcasecmp(cpu_type_name, "SPARCv9") != 0)
61			return 0;
62
63			cpu->memory_rw = sparc_memory_rw;
64			cpu->update_translation_table = sparc_update_translation_table;
65	dpavlin	18	cpu->invalidate_translation_caches =
66			sparc_invalidate_translation_caches;
67	dpavlin	14	cpu->invalidate_code_translation =
68			sparc_invalidate_code_translation;
69
70			cpu->byte_order = EMUL_BIG_ENDIAN;
71			cpu->is_32bit = 0;
72
73			/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
74			if (cpu_id == 0) {
75			debug("%s", cpu->name);
76			}
77
78			return 1;
79			}
80
81
82			/*
83			* sparc_cpu_list_available_types():
84			*
85			* Print a list of available SPARC CPU types.
86			*/
87			void sparc_cpu_list_available_types(void)
88			{
89			debug("SPARCv9\n");
90			/* TODO */
91			}
92
93
94			/*
95			* sparc_cpu_dumpinfo():
96			*/
97			void sparc_cpu_dumpinfo(struct cpu *cpu)
98			{
99			debug("\n");
100			/* TODO */
101			}
102
103
104			/*
105			* sparc_cpu_register_dump():
106			*
107			* Dump cpu registers in a relatively readable format.
108			*
109			* gprs: set to non-zero to dump GPRs and some special-purpose registers.
110			* coprocs: set bit 0..3 to dump registers in coproc 0..3.
111			*/
112			void sparc_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
113			{
114			char *symbol;
115			uint64_t offset, tmp;
116			int i, x = cpu->cpu_id;
117			int bits32 = 0;
118
119			if (gprs) {
120			/* Special registers (pc, ...) first: */
121			symbol = get_symbol_name(&cpu->machine->symbol_context,
122			cpu->pc, &offset);
123
124			debug("cpu%i: pc = 0x", x);
125			if (bits32)
126			debug("%08x", (int)cpu->pc);
127			else
128			debug("%016llx", (long long)cpu->pc);
129			debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
130
131			/* TODO */
132			}
133			}
134
135
136			/*
137			* sparc_cpu_register_match():
138			*/
139			void sparc_cpu_register_match(struct machine m, char name,
140			int writeflag, uint64_t valuep, int match_register)
141			{
142			int cpunr = 0;
143
144			/* CPU number: */
145
146			/* TODO */
147
148			/* Register name: */
149			if (strcasecmp(name, "pc") == 0) {
150			if (writeflag) {
151			m->cpus[cpunr]->pc = *valuep;
152			} else
153			*valuep = m->cpus[cpunr]->pc;
154			*match_register = 1;
155			}
156			}
157
158
159			/*
160			* sparc_cpu_show_full_statistics():
161			*
162			* Show detailed statistics on opcode usage on each cpu.
163			*/
164			void sparc_cpu_show_full_statistics(struct machine *m)
165			{
166			fatal("sparc_cpu_show_full_statistics(): TODO\n");
167			}
168
169
170			/*
171			* sparc_cpu_tlbdump():
172			*
173			* Called from the debugger to dump the TLB in a readable format.
174			* x is the cpu number to dump, or -1 to dump all CPUs.
175			*
176			* If rawflag is nonzero, then the TLB contents isn't formated nicely,
177			* just dumped.
178			*/
179			void sparc_cpu_tlbdump(struct machine *m, int x, int rawflag)
180			{
181			fatal("sparc_cpu_tlbdump(): TODO\n");
182			}
183
184
185			/*
186			* sparc_cpu_interrupt():
187			*/
188			int sparc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
189			{
190			fatal("sparc_cpu_interrupt(): TODO\n");
191			return 0;
192			}
193
194
195			/*
196			* sparc_cpu_interrupt_ack():
197			*/
198			int sparc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
199			{
200			/* fatal("sparc_cpu_interrupt_ack(): TODO\n"); */
201			return 0;
202			}
203
204
205			/*
206			* sparc_cpu_disassemble_instr():
207			*
208			* Convert an instruction word into human readable format, for instruction
209			* tracing.
210			*
211			* If running is 1, cpu->pc should be the address of the instruction.
212			*
213			* If running is 0, things that depend on the runtime environment (eg.
214			* register contents) will not be shown, and addr will be used instead of
215			* cpu->pc for relative addresses.
216			*/
217			int sparc_cpu_disassemble_instr(struct cpu cpu, unsigned char instr,
218			int running, uint64_t dumpaddr, int bintrans)
219			{
220			uint64_t offset, addr;
221			uint32_t iword;
222			int hi6;
223			char symbol, mnem = "ERROR";
224
225			if (running)
226			dumpaddr = cpu->pc;
227
228			symbol = get_symbol_name(&cpu->machine->symbol_context,
229			dumpaddr, &offset);
230			if (symbol != NULL && offset==0)
231			debug("<%s>\n", symbol);
232
233			if (cpu->machine->ncpus > 1 && running)
234			debug("cpu%i: ", cpu->cpu_id);
235
236			/* if (cpu->cd.sparc.bits == 32)
237			debug("%08x", (int)dumpaddr);
238			else
239			*/ debug("%016llx", (long long)dumpaddr);
240
241			iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8)
242			+ instr[3];
243
244			debug(": %08x\t", iword);
245
246			/*
247			* Decode the instruction:
248			*/
249
250			hi6 = iword >> 26;
251
252			switch (hi6) {
253			default:
254			/* TODO */
255			debug("unimplemented hi6 = 0x%02x", hi6);
256			}
257
258			debug("\n");
259			return sizeof(iword);
260			}
261
262
263			#include "tmp_sparc_tail.c"
264