1 |
/* |
/* |
2 |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2007 Anders Gavare. All rights reserved. |
3 |
* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
28 |
* $Id: cpu_ppc.c,v 1.59 2006/06/24 21:47:23 debug Exp $ |
* $Id: cpu_ppc.c,v 1.72 2007/06/28 13:36:46 debug Exp $ |
29 |
* |
* |
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* PowerPC/POWER CPU emulation. |
* PowerPC/POWER CPU emulation. |
31 |
*/ |
*/ |
37 |
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#include "cpu.h" |
#include "cpu.h" |
39 |
#include "devices.h" |
#include "devices.h" |
40 |
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#include "interrupt.h" |
41 |
#include "machine.h" |
#include "machine.h" |
42 |
#include "memory.h" |
#include "memory.h" |
43 |
#include "misc.h" |
#include "misc.h" |
47 |
#include "ppc_pte.h" |
#include "ppc_pte.h" |
48 |
#include "ppc_spr.h" |
#include "ppc_spr.h" |
49 |
#include "ppc_spr_strings.h" |
#include "ppc_spr_strings.h" |
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#include "settings.h" |
51 |
#include "symbol.h" |
#include "symbol.h" |
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#include "useremul.h" |
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#define DYNTRANS_DUALMODE_32 |
#define DYNTRANS_DUALMODE_32 |
56 |
#include "tmp_ppc_head.c" |
#include "tmp_ppc_head.c" |
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void ppc_pc_to_pointers(struct cpu *); |
void ppc_pc_to_pointers(struct cpu *); |
60 |
void ppc32_pc_to_pointers(struct cpu *); |
void ppc32_pc_to_pointers(struct cpu *); |
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62 |
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void ppc_irq_interrupt_assert(struct interrupt *interrupt); |
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void ppc_irq_interrupt_deassert(struct interrupt *interrupt); |
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/* |
/* |
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* ppc_cpu_new(): |
* ppc_cpu_new(): |
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cpu->memory_rw = ppc_memory_rw; |
cpu->memory_rw = ppc_memory_rw; |
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96 |
cpu->cd.ppc.cpu_type = cpu_type_defs[found]; |
cpu->cd.ppc.cpu_type = cpu_type_defs[found]; |
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cpu->name = cpu->cd.ppc.cpu_type.name; |
cpu->name = cpu->cd.ppc.cpu_type.name; |
98 |
cpu->byte_order = EMUL_BIG_ENDIAN; |
cpu->byte_order = EMUL_BIG_ENDIAN; |
99 |
cpu->cd.ppc.mode = MODE_PPC; /* TODO */ |
cpu->cd.ppc.mode = MODE_PPC; /* TODO */ |
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|
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/* Current operating mode: */ |
/* Current operating mode: */ |
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cpu->cd.ppc.bits = cpu->cd.ppc.cpu_type.bits; |
cpu->cd.ppc.bits = cpu->cd.ppc.cpu_type.bits; |
123 |
cpu->is_32bit = (cpu->cd.ppc.bits == 32)? 1 : 0; |
cpu->is_32bit = (cpu->cd.ppc.bits == 32)? 1 : 0; |
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if (cpu->is_32bit) { |
if (cpu->is_32bit) { |
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cpu->run_instr = ppc32_run_instr; |
127 |
cpu->update_translation_table = ppc32_update_translation_table; |
cpu->update_translation_table = ppc32_update_translation_table; |
128 |
cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
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ppc32_invalidate_translation_caches; |
ppc32_invalidate_translation_caches; |
130 |
cpu->invalidate_code_translation = |
cpu->invalidate_code_translation = |
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ppc32_invalidate_code_translation; |
ppc32_invalidate_code_translation; |
132 |
} else { |
} else { |
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cpu->run_instr = ppc_run_instr; |
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cpu->update_translation_table = ppc_update_translation_table; |
cpu->update_translation_table = ppc_update_translation_table; |
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cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
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ppc_invalidate_translation_caches; |
ppc_invalidate_translation_caches; |
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if (cpu->machine->prom_emulation) |
if (cpu->machine->prom_emulation) |
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cpu->cd.ppc.of_emul_addr = 0xfff00000; |
cpu->cd.ppc.of_emul_addr = 0xfff00000; |
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/* Add all register names to the settings: */ |
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CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
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CPU_SETTINGS_ADD_REGISTER64("msr", cpu->cd.ppc.msr); |
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CPU_SETTINGS_ADD_REGISTER64("ctr", cpu->cd.ppc.spr[SPR_CTR]); |
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CPU_SETTINGS_ADD_REGISTER64("xer", cpu->cd.ppc.spr[SPR_XER]); |
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CPU_SETTINGS_ADD_REGISTER64("dec", cpu->cd.ppc.spr[SPR_DEC]); |
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CPU_SETTINGS_ADD_REGISTER64("hdec", cpu->cd.ppc.spr[SPR_HDEC]); |
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CPU_SETTINGS_ADD_REGISTER64("srr0", cpu->cd.ppc.spr[SPR_SRR0]); |
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CPU_SETTINGS_ADD_REGISTER64("srr1", cpu->cd.ppc.spr[SPR_SRR1]); |
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CPU_SETTINGS_ADD_REGISTER64("sdr1", cpu->cd.ppc.spr[SPR_SDR1]); |
188 |
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CPU_SETTINGS_ADD_REGISTER64("ibat0u", cpu->cd.ppc.spr[SPR_IBAT0U]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat0l", cpu->cd.ppc.spr[SPR_IBAT0L]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat1u", cpu->cd.ppc.spr[SPR_IBAT1U]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat1l", cpu->cd.ppc.spr[SPR_IBAT1L]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat2u", cpu->cd.ppc.spr[SPR_IBAT2U]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat2l", cpu->cd.ppc.spr[SPR_IBAT2L]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat3u", cpu->cd.ppc.spr[SPR_IBAT3U]); |
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CPU_SETTINGS_ADD_REGISTER64("ibat3l", cpu->cd.ppc.spr[SPR_IBAT3L]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat0u", cpu->cd.ppc.spr[SPR_DBAT0U]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat0l", cpu->cd.ppc.spr[SPR_DBAT0L]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat1u", cpu->cd.ppc.spr[SPR_DBAT1U]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat1l", cpu->cd.ppc.spr[SPR_DBAT1L]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat2u", cpu->cd.ppc.spr[SPR_DBAT2U]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat2l", cpu->cd.ppc.spr[SPR_DBAT2L]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat3u", cpu->cd.ppc.spr[SPR_DBAT3U]); |
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CPU_SETTINGS_ADD_REGISTER64("dbat3l", cpu->cd.ppc.spr[SPR_DBAT3L]); |
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CPU_SETTINGS_ADD_REGISTER64("lr", cpu->cd.ppc.spr[SPR_LR]); |
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CPU_SETTINGS_ADD_REGISTER32("cr", cpu->cd.ppc.cr); |
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CPU_SETTINGS_ADD_REGISTER32("fpscr", cpu->cd.ppc.fpscr); |
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/* Integer GPRs, floating point registers, and segment registers: */ |
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for (i=0; i<PPC_NGPRS; i++) { |
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char tmpstr[5]; |
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snprintf(tmpstr, sizeof(tmpstr), "r%i", i); |
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CPU_SETTINGS_ADD_REGISTER64(tmpstr, cpu->cd.ppc.gpr[i]); |
212 |
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} |
213 |
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for (i=0; i<PPC_NFPRS; i++) { |
214 |
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char tmpstr[5]; |
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snprintf(tmpstr, sizeof(tmpstr), "f%i", i); |
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CPU_SETTINGS_ADD_REGISTER64(tmpstr, cpu->cd.ppc.fpr[i]); |
217 |
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} |
218 |
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for (i=0; i<16; i++) { |
219 |
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char tmpstr[5]; |
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snprintf(tmpstr, sizeof(tmpstr), "sr%i", i); |
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CPU_SETTINGS_ADD_REGISTER32(tmpstr, cpu->cd.ppc.sr[i]); |
222 |
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} |
223 |
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/* Register the CPU as an interrupt handler: */ |
225 |
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{ |
226 |
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struct interrupt template; |
227 |
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char name[150]; |
228 |
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snprintf(name, sizeof(name), "%s", cpu->path); |
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memset(&template, 0, sizeof(template)); |
230 |
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template.line = 0; |
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template.name = name; |
232 |
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template.extra = cpu; |
233 |
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template.interrupt_assert = ppc_irq_interrupt_assert; |
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template.interrupt_deassert = ppc_irq_interrupt_deassert; |
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interrupt_handler_register(&template); |
236 |
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} |
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return 1; |
return 1; |
239 |
} |
} |
240 |
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*valuep = cpu->cd.ppc.msr; |
*valuep = cpu->cd.ppc.msr; |
340 |
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341 |
if (check_for_interrupts && cpu->cd.ppc.msr & PPC_MSR_EE) { |
if (check_for_interrupts && cpu->cd.ppc.msr & PPC_MSR_EE) { |
342 |
if (cpu->cd.ppc.dec_intr_pending) { |
if (cpu->cd.ppc.dec_intr_pending && |
343 |
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!(cpu->cd.ppc.cpu_type.flags & PPC_NO_DEC)) { |
344 |
ppc_exception(cpu, PPC_EXCEPTION_DEC); |
ppc_exception(cpu, PPC_EXCEPTION_DEC); |
345 |
cpu->cd.ppc.dec_intr_pending = 0; |
cpu->cd.ppc.dec_intr_pending = 0; |
346 |
} else if (cpu->cd.ppc.irq_asserted) |
} else if (cpu->cd.ppc.irq_asserted) |
364 |
cpu->cd.ppc.spr[SPR_SRR1] = (cpu->cd.ppc.msr & 0x87c0ffff); |
cpu->cd.ppc.spr[SPR_SRR1] = (cpu->cd.ppc.msr & 0x87c0ffff); |
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366 |
if (!quiet_mode) |
if (!quiet_mode) |
367 |
fatal("[ PPC Exception 0x%x; pc=0x%"PRIx64" ]\n", exception_nr, |
fatal("[ PPC Exception 0x%x; pc=0x%"PRIx64" ]\n", |
368 |
(long long)cpu->pc); |
exception_nr, cpu->pc); |
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|
370 |
/* Disable External Interrupts, Recoverable Interrupt Mode, |
/* Disable External Interrupts, Recoverable Interrupt Mode, |
371 |
and go to Supervisor mode */ |
and go to Supervisor mode */ |
439 |
for (i=0; i<PPC_NGPRS; i++) { |
for (i=0; i<PPC_NGPRS; i++) { |
440 |
if ((i % 4) == 0) |
if ((i % 4) == 0) |
441 |
debug("cpu%i:", x); |
debug("cpu%i:", x); |
442 |
debug(" r%02i = 0x%08x ", i, |
debug(" r%02i = 0x%08"PRIx32" ", i, |
443 |
(int)cpu->cd.ppc.gpr[i]); |
(uint32_t) cpu->cd.ppc.gpr[i]); |
444 |
if ((i % 4) == 3) |
if ((i % 4) == 3) |
445 |
debug("\n"); |
debug("\n"); |
446 |
} |
} |
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int r = (i >> 1) + ((i & 1) << 4); |
int r = (i >> 1) + ((i & 1) << 4); |
451 |
if ((i % 2) == 0) |
if ((i % 2) == 0) |
452 |
debug("cpu%i:", x); |
debug("cpu%i:", x); |
453 |
debug(" r%02i = 0x%016llx ", r, |
debug(" r%02i = 0x%016"PRIx64" ", r, |
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(long long)cpu->cd.ppc.gpr[r]); |
(uint64_t) cpu->cd.ppc.gpr[r]); |
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if ((i % 2) == 1) |
if ((i % 2) == 1) |
456 |
debug("\n"); |
debug("\n"); |
457 |
} |
} |
459 |
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/* Other special registers: */ |
/* Other special registers: */ |
461 |
if (bits32) { |
if (bits32) { |
462 |
debug("cpu%i: srr0 = 0x%08x srr1 = 0x%08x\n", x, |
debug("cpu%i: srr0 = 0x%08"PRIx32 |
463 |
(int)cpu->cd.ppc.spr[SPR_SRR0], |
" srr1 = 0x%08"PRIx32"\n", x, |
464 |
(int)cpu->cd.ppc.spr[SPR_SRR1]); |
(uint32_t) cpu->cd.ppc.spr[SPR_SRR0], |
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|
(uint32_t) cpu->cd.ppc.spr[SPR_SRR1]); |
466 |
} else { |
} else { |
467 |
debug("cpu%i: srr0 = 0x%016llx srr1 = 0x%016llx\n", x, |
debug("cpu%i: srr0 = 0x%016"PRIx64 |
468 |
(long long)cpu->cd.ppc.spr[SPR_SRR0], |
" srr1 = 0x%016"PRIx64"\n", x, |
469 |
(long long)cpu->cd.ppc.spr[SPR_SRR1]); |
(uint64_t) cpu->cd.ppc.spr[SPR_SRR0], |
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(uint64_t) cpu->cd.ppc.spr[SPR_SRR1]); |
471 |
} |
} |
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debug("cpu%i: msr = ", x); |
debug("cpu%i: msr = ", x); |
474 |
reg_access_msr(cpu, &tmp, 0, 0); |
reg_access_msr(cpu, &tmp, 0, 0); |
475 |
if (bits32) |
if (bits32) |
476 |
debug("0x%08x ", (int)tmp); |
debug("0x%08"PRIx32, (uint32_t) tmp); |
477 |
else |
else |
478 |
debug("0x%016llx ", (long long)tmp); |
debug("0x%016"PRIx64, (uint64_t) tmp); |
479 |
debug("tb = 0x%08x%08x\n", (int)cpu->cd.ppc.spr[SPR_TBU], |
|
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(int)cpu->cd.ppc.spr[SPR_TBL]); |
debug(" tb = 0x%08"PRIx32"%08"PRIx32"\n", |
481 |
debug("cpu%i: dec = 0x%08x", x, (int)cpu->cd.ppc.spr[SPR_DEC]); |
(uint32_t) cpu->cd.ppc.spr[SPR_TBU], |
482 |
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(uint32_t) cpu->cd.ppc.spr[SPR_TBL]); |
483 |
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484 |
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debug("cpu%i: dec = 0x%08"PRIx32, |
485 |
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x, (uint32_t) cpu->cd.ppc.spr[SPR_DEC]); |
486 |
if (!bits32) |
if (!bits32) |
487 |
debug(" hdec = 0x%08x\n", |
debug(" hdec = 0x%08"PRIx32"\n", |
488 |
(int)cpu->cd.ppc.spr[SPR_HDEC]); |
(uint32_t) cpu->cd.ppc.spr[SPR_HDEC]); |
489 |
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|
490 |
debug("\n"); |
debug("\n"); |
491 |
} |
} |
492 |
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493 |
if (coprocs & 1) { |
if (coprocs & 1) { |
494 |
debug("cpu%i: fpscr = 0x%08x\n", x, (int)cpu->cd.ppc.fpscr); |
debug("cpu%i: fpscr = 0x%08"PRIx32"\n", |
495 |
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x, (uint32_t) cpu->cd.ppc.fpscr); |
496 |
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497 |
/* TODO: show floating-point values :-) */ |
/* TODO: show floating-point values :-) */ |
498 |
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501 |
for (i=0; i<PPC_NFPRS; i++) { |
for (i=0; i<PPC_NFPRS; i++) { |
502 |
if ((i % 2) == 0) |
if ((i % 2) == 0) |
503 |
debug("cpu%i:", x); |
debug("cpu%i:", x); |
504 |
debug(" f%02i = 0x%016llx ", i, |
debug(" f%02i = 0x%016"PRIx64" ", i, |
505 |
(long long)cpu->cd.ppc.fpr[i]); |
(uint64_t) cpu->cd.ppc.fpr[i]); |
506 |
if ((i % 2) == 1) |
if ((i % 2) == 1) |
507 |
debug("\n"); |
debug("\n"); |
508 |
} |
} |
509 |
} |
} |
510 |
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|
511 |
if (coprocs & 2) { |
if (coprocs & 2) { |
512 |
debug("cpu%i: sdr1 = 0x%llx\n", x, |
debug("cpu%i: sdr1 = 0x%"PRIx64"\n", x, |
513 |
(long long)cpu->cd.ppc.spr[SPR_SDR1]); |
(uint64_t) cpu->cd.ppc.spr[SPR_SDR1]); |
514 |
if (cpu->cd.ppc.cpu_type.flags & PPC_601) |
if (cpu->cd.ppc.cpu_type.flags & PPC_601) |
515 |
debug("cpu%i: PPC601-style, TODO!\n"); |
debug("cpu%i: PPC601-style, TODO!\n"); |
516 |
else { |
else { |
520 |
uint32_t lower = cpu->cd.ppc.spr[spr+1]; |
uint32_t lower = cpu->cd.ppc.spr[spr+1]; |
521 |
uint32_t len = (((upper & BAT_BL) << 15) |
uint32_t len = (((upper & BAT_BL) << 15) |
522 |
| 0x1ffff) + 1; |
| 0x1ffff) + 1; |
523 |
debug("cpu%i: %sbat%i: u=0x%08x l=0x%08x ", |
debug("cpu%i: %sbat%i: u=0x%08"PRIx32 |
524 |
|
" l=0x%08"PRIx32" ", |
525 |
x, i<4? "i" : "d", i&3, upper, lower); |
x, i<4? "i" : "d", i&3, upper, lower); |
526 |
if (!(upper & BAT_V)) { |
if (!(upper & BAT_V)) { |
527 |
debug(" (not valid)\n"); |
debug(" (not valid)\n"); |
556 |
if (coprocs & 4) { |
if (coprocs & 4) { |
557 |
for (i=0; i<16; i++) { |
for (i=0; i<16; i++) { |
558 |
uint32_t s = cpu->cd.ppc.sr[i]; |
uint32_t s = cpu->cd.ppc.sr[i]; |
559 |
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|
560 |
debug("cpu%i:", x); |
debug("cpu%i:", x); |
561 |
debug(" sr%2i = 0x%08x", i, (int)s); |
debug(" sr%-2i = 0x%08"PRIx32, i, s); |
562 |
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|
563 |
s &= (SR_TYPE | SR_SUKEY | SR_PRKEY | SR_NOEXEC); |
s &= (SR_TYPE | SR_SUKEY | SR_PRKEY | SR_NOEXEC); |
564 |
if (s != 0) { |
if (s != 0) { |
565 |
debug(" ("); |
debug(" ("); |
592 |
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593 |
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594 |
/* |
/* |
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* ppc_cpu_register_match(): |
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*/ |
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void ppc_cpu_register_match(struct machine *m, char *name, |
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int writeflag, uint64_t *valuep, int *match_register) |
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{ |
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int cpunr = 0; |
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/* CPU number: */ |
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/* TODO */ |
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/* Register name: */ |
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if (strcasecmp(name, "pc") == 0) { |
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if (writeflag) { |
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m->cpus[cpunr]->pc = *valuep; |
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} else |
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*valuep = m->cpus[cpunr]->pc; |
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*match_register = 1; |
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} else if (strcasecmp(name, "msr") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.msr = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.msr; |
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*match_register = 1; |
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} else if (strcasecmp(name, "lr") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.spr[SPR_LR] = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_LR]; |
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*match_register = 1; |
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} else if (strcasecmp(name, "cr") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.cr = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.cr; |
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*match_register = 1; |
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} else if (strcasecmp(name, "dec") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.spr[SPR_DEC] = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_DEC]; |
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*match_register = 1; |
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} else if (strcasecmp(name, "hdec") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.spr[SPR_HDEC] = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_HDEC]; |
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*match_register = 1; |
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} else if (strcasecmp(name, "ctr") == 0) { |
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if (writeflag) |
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m->cpus[cpunr]->cd.ppc.spr[SPR_CTR] = *valuep; |
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else |
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*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_CTR]; |
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*match_register = 1; |
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|
} else if (name[0] == 'r' && isdigit((int)name[1])) { |
|
|
int nr = atoi(name + 1); |
|
|
if (nr >= 0 && nr < PPC_NGPRS) { |
|
|
if (writeflag) { |
|
|
m->cpus[cpunr]->cd.ppc.gpr[nr] = *valuep; |
|
|
} else |
|
|
*valuep = m->cpus[cpunr]->cd.ppc.gpr[nr]; |
|
|
*match_register = 1; |
|
|
} |
|
|
} else if (strcasecmp(name, "xer") == 0) { |
|
|
if (writeflag) |
|
|
m->cpus[cpunr]->cd.ppc.spr[SPR_XER] = *valuep; |
|
|
else |
|
|
*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_XER]; |
|
|
*match_register = 1; |
|
|
} else if (strcasecmp(name, "fpscr") == 0) { |
|
|
if (writeflag) |
|
|
m->cpus[cpunr]->cd.ppc.fpscr = *valuep; |
|
|
else |
|
|
*valuep = m->cpus[cpunr]->cd.ppc.fpscr; |
|
|
*match_register = 1; |
|
|
} else if (name[0] == 'f' && isdigit((int)name[1])) { |
|
|
int nr = atoi(name + 1); |
|
|
if (nr >= 0 && nr < PPC_NFPRS) { |
|
|
if (writeflag) { |
|
|
m->cpus[cpunr]->cd.ppc.fpr[nr] = *valuep; |
|
|
} else |
|
|
*valuep = m->cpus[cpunr]->cd.ppc.fpr[nr]; |
|
|
*match_register = 1; |
|
|
} |
|
|
} |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
595 |
* ppc_cpu_tlbdump(): |
* ppc_cpu_tlbdump(): |
596 |
* |
* |
597 |
* Not currently used for PPC. |
* Not currently used for PPC. |
601 |
} |
} |
602 |
|
|
603 |
|
|
|
static void add_response_word(struct cpu *cpu, char *r, uint64_t value, |
|
|
size_t maxlen, int len) |
|
|
{ |
|
|
char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64; |
|
|
if (len == 4) |
|
|
value &= 0xffffffffULL; |
|
|
if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
|
|
if (len == 4) { |
|
|
value = ((value & 0xff) << 24) + |
|
|
((value & 0xff00) << 8) + |
|
|
((value & 0xff0000) >> 8) + |
|
|
((value & 0xff000000) >> 24); |
|
|
} else { |
|
|
value = ((value & 0xff) << 56) + |
|
|
((value & 0xff00) << 40) + |
|
|
((value & 0xff0000) << 24) + |
|
|
((value & 0xff000000ULL) << 8) + |
|
|
((value & 0xff00000000ULL) >> 8) + |
|
|
((value & 0xff0000000000ULL) >> 24) + |
|
|
((value & 0xff000000000000ULL) >> 40) + |
|
|
((value & 0xff00000000000000ULL) >> 56); |
|
|
} |
|
|
} |
|
|
snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value); |
|
|
} |
|
|
|
|
|
|
|
604 |
/* |
/* |
605 |
* ppc_cpu_gdb_stub(): |
* ppc_irq_interrupt_assert(): |
|
* |
|
|
* Execute a "remote GDB" command. Returns a newly allocated response string |
|
|
* on success, NULL on failure. |
|
606 |
*/ |
*/ |
607 |
char *ppc_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
void ppc_irq_interrupt_assert(struct interrupt *interrupt) |
608 |
{ |
{ |
609 |
if (strcmp(cmd, "g") == 0) { |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
610 |
int i; |
cpu->cd.ppc.irq_asserted = 1; |
|
char *r; |
|
|
size_t wlen = cpu->is_32bit? |
|
|
sizeof(uint32_t) : sizeof(uint64_t); |
|
|
size_t len = 1 + 76 * wlen; |
|
|
r = malloc(len); |
|
|
if (r == NULL) { |
|
|
fprintf(stderr, "out of memory\n"); |
|
|
exit(1); |
|
|
} |
|
|
r[0] = '\0'; |
|
|
for (i=0; i<128; i++) |
|
|
add_response_word(cpu, r, i, len, wlen); |
|
|
return r; |
|
|
} |
|
|
|
|
|
if (cmd[0] == 'p') { |
|
|
int regnr = strtol(cmd + 1, NULL, 16); |
|
|
size_t wlen = cpu->is_32bit? |
|
|
sizeof(uint32_t) : sizeof(uint64_t); |
|
|
size_t len = 2 * wlen + 1; |
|
|
char *r = malloc(len); |
|
|
r[0] = '\0'; |
|
|
if (regnr >= 0 && regnr <= 31) { |
|
|
add_response_word(cpu, r, |
|
|
cpu->cd.ppc.gpr[regnr], len, wlen); |
|
|
} else if (regnr == 0x40) { |
|
|
add_response_word(cpu, r, cpu->pc, len, wlen); |
|
|
} else if (regnr == 0x42) { |
|
|
add_response_word(cpu, r, cpu->cd.ppc.cr, len, wlen); |
|
|
} else if (regnr == 0x43) { |
|
|
add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_LR], |
|
|
len, wlen); |
|
|
} else if (regnr == 0x44) { |
|
|
add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_CTR], |
|
|
len, wlen); |
|
|
} else if (regnr == 0x45) { |
|
|
add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_XER], |
|
|
len, wlen); |
|
|
} else { |
|
|
/* Unimplemented: */ |
|
|
add_response_word(cpu, r, 0xcc000 + regnr, len, wlen); |
|
|
} |
|
|
return r; |
|
|
} |
|
|
|
|
|
fatal("ppc_cpu_gdb_stub(): TODO\n"); |
|
|
return NULL; |
|
611 |
} |
} |
612 |
|
|
613 |
|
|
614 |
/* |
/* |
615 |
* ppc_cpu_interrupt(): |
* ppc_irq_interrupt_deassert(): |
|
* |
|
|
* 0..31 are used as BeBox interrupt numbers, 32..47 = ISA, |
|
|
* 64 is used as a "re-assert" signal to cpu->machine->md_interrupt(). |
|
|
* |
|
|
* TODO: don't hardcode to BeBox! |
|
616 |
*/ |
*/ |
617 |
int ppc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) |
void ppc_irq_interrupt_deassert(struct interrupt *interrupt) |
618 |
{ |
{ |
619 |
/* fatal("ppc_cpu_interrupt(): 0x%x\n", (int)irq_nr); */ |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
620 |
if (irq_nr <= 64) { |
cpu->cd.ppc.irq_asserted = 0; |
|
if (cpu->machine->md_interrupt != NULL) |
|
|
cpu->machine->md_interrupt( |
|
|
cpu->machine, cpu, irq_nr, 1); |
|
|
else |
|
|
fatal("ppc_cpu_interrupt(): md_interrupt == NULL\n"); |
|
|
} else { |
|
|
/* Assert PPC IRQ: */ |
|
|
cpu->cd.ppc.irq_asserted = 1; |
|
|
} |
|
|
return 1; |
|
|
} |
|
|
|
|
|
|
|
|
/* |
|
|
* ppc_cpu_interrupt_ack(): |
|
|
*/ |
|
|
int ppc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) |
|
|
{ |
|
|
if (irq_nr <= 64) { |
|
|
if (cpu->machine->md_interrupt != NULL) |
|
|
cpu->machine->md_interrupt(cpu->machine, |
|
|
cpu, irq_nr, 0); |
|
|
} else { |
|
|
/* De-assert PPC IRQ: */ |
|
|
cpu->cd.ppc.irq_asserted = 0; |
|
|
} |
|
|
return 1; |
|
621 |
} |
} |
622 |
|
|
623 |
|
|
656 |
debug("cpu%i: ", cpu->cpu_id); |
debug("cpu%i: ", cpu->cpu_id); |
657 |
|
|
658 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
659 |
debug("%08x", (int)dumpaddr); |
debug("%08"PRIx32, (uint32_t) dumpaddr); |
660 |
else |
else |
661 |
debug("%016llx", (long long)dumpaddr); |
debug("%016"PRIx64, (uint64_t) dumpaddr); |
662 |
|
|
663 |
/* NOTE: Fixed to big-endian. */ |
/* NOTE: Fixed to big-endian. */ |
664 |
iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8) |
iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8) |
665 |
+ instr[3]; |
+ instr[3]; |
666 |
|
|
667 |
debug(": %08x\t", iword); |
debug(": %08"PRIx32"\t", iword); |
668 |
|
|
669 |
/* |
/* |
670 |
* Decode the instruction: |
* Decode the instruction: |
765 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
766 |
addr &= 0xffffffff; |
addr &= 0xffffffff; |
767 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
768 |
debug("0x%x", (int)addr); |
debug("0x%"PRIx32, (uint32_t) addr); |
769 |
else |
else |
770 |
debug("0x%llx", (long long)addr); |
debug("0x%"PRIx64, (uint64_t) addr); |
771 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
772 |
addr, &offset); |
addr, &offset); |
773 |
if (symbol != NULL) |
if (symbol != NULL) |
798 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
799 |
addr &= 0xffffffff; |
addr &= 0xffffffff; |
800 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
801 |
debug("\t0x%x", (int)addr); |
debug("\t0x%"PRIx32, (uint32_t) addr); |
802 |
else |
else |
803 |
debug("\t0x%llx", (long long)addr); |
debug("\t0x%"PRIx64, (uint64_t) addr); |
804 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
805 |
addr, &offset); |
addr, &offset); |
806 |
if (symbol != NULL) |
if (symbol != NULL) |
1089 |
if (symbol != NULL) |
if (symbol != NULL) |
1090 |
debug(" \t<%s", symbol); |
debug(" \t<%s", symbol); |
1091 |
else |
else |
1092 |
debug(" \t<0x%llx", (long long)addr); |
debug(" \t<0x%"PRIx64, (uint64_t) addr); |
1093 |
if (wlen > 0 && !fpreg /* && !reverse */) { |
if (wlen > 0 && !fpreg /* && !reverse */) { |
1094 |
/* TODO */ |
/* TODO */ |
1095 |
} |
} |
1260 |
ppc_spr_names[spr]==NULL? "?" : ppc_spr_names[spr]); |
ppc_spr_names[spr]==NULL? "?" : ppc_spr_names[spr]); |
1261 |
if (running) { |
if (running) { |
1262 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
1263 |
debug(": 0x%x", (int) |
debug(": 0x%"PRIx32, (uint32_t) |
1264 |
cpu->cd.ppc.spr[spr]); |
cpu->cd.ppc.spr[spr]); |
1265 |
else |
else |
1266 |
debug(": 0x%llx", (long long) |
debug(": 0x%"PRIx64, (uint64_t) |
1267 |
cpu->cd.ppc.spr[spr]); |
cpu->cd.ppc.spr[spr]); |
1268 |
} |
} |
1269 |
debug(">"); |
debug(">"); |
1420 |
ppc_spr_names[spr]==NULL? "?" : ppc_spr_names[spr]); |
ppc_spr_names[spr]==NULL? "?" : ppc_spr_names[spr]); |
1421 |
if (running) { |
if (running) { |
1422 |
if (cpu->cd.ppc.bits == 32) |
if (cpu->cd.ppc.bits == 32) |
1423 |
debug(": 0x%x", (int) |
debug(": 0x%"PRIx32, (uint32_t) |
1424 |
cpu->cd.ppc.gpr[rs]); |
cpu->cd.ppc.gpr[rs]); |
1425 |
else |
else |
1426 |
debug(": 0x%llx", (long long) |
debug(": 0x%"PRIx64, (uint64_t) |
1427 |
cpu->cd.ppc.gpr[rs]); |
cpu->cd.ppc.gpr[rs]); |
1428 |
} |
} |
1429 |
debug(">"); |
debug(">"); |
1576 |
if (symbol != NULL) |
if (symbol != NULL) |
1577 |
debug(" \t<%s", symbol); |
debug(" \t<%s", symbol); |
1578 |
else |
else |
1579 |
debug(" \t<0x%llx", (long long)addr); |
debug(" \t<0x%"PRIx64, (uint64_t) addr); |
1580 |
if (wlen > 0 && load && wlen > 0) { |
if (wlen > 0 && load && wlen > 0) { |
1581 |
unsigned char tw[8]; |
unsigned char tw[8]; |
1582 |
uint64_t tdata = 0; |
uint64_t tdata = 0; |
1600 |
if (symbol != NULL) |
if (symbol != NULL) |
1601 |
debug("%s", symbol); |
debug("%s", symbol); |
1602 |
else |
else |
1603 |
debug("0x%llx", |
debug("0x%"PRIx64, |
1604 |
(long long)tdata); |
(uint64_t) tdata); |
1605 |
} else { |
} else { |
1606 |
/* TODO: if load==2, then this is |
/* TODO: if load==2, then this is |
1607 |
a _signed_ load. */ |
a _signed_ load. */ |
1608 |
debug("0x%llx", (long long)tdata); |
debug("0x%"PRIx64, (uint64_t) tdata); |
1609 |
} |
} |
1610 |
} else |
} else |
1611 |
debug(": unreadable"); |
debug(": unreadable"); |
1623 |
if (symbol != NULL) |
if (symbol != NULL) |
1624 |
debug("%s", symbol); |
debug("%s", symbol); |
1625 |
else |
else |
1626 |
debug("0x%llx", (long long)tdata); |
debug("0x%"PRIx64, (uint64_t) tdata); |
1627 |
} else { |
} else { |
1628 |
if (tdata > -256 && tdata < 256) |
if (tdata > -256 && tdata < 256) |
1629 |
debug("%i", (int)tdata); |
debug("%i", (int)tdata); |
1630 |
else |
else |
1631 |
debug("0x%llx", (long long)tdata); |
debug("0x%"PRIx64, (uint64_t) tdata); |
1632 |
} |
} |
1633 |
} |
} |
1634 |
debug(">"); |
debug(">"); |
1820 |
break; |
break; |
1821 |
} else |
} else |
1822 |
fatal("[ using UNIMPLEMENTED spr %i (%s), pc = " |
fatal("[ using UNIMPLEMENTED spr %i (%s), pc = " |
1823 |
"0x%llx ]\n", spr, ppc_spr_names[spr] == NULL? |
"0x%"PRIx64" ]\n", spr, ppc_spr_names[spr] == NULL? |
1824 |
"UNKNOWN" : ppc_spr_names[spr], (long long)pc); |
"UNKNOWN" : ppc_spr_names[spr], (uint64_t) pc); |
1825 |
} |
} |
1826 |
|
|
1827 |
spr_used[spr >> 2] |= (1 << (spr & 3)); |
spr_used[spr >> 2] |= (1 << (spr & 3)); |