--- trunk/src/cpus/cpu_ppc.c	2007/10/08 16:20:10	26
+++ trunk/src/cpus/cpu_ppc.c	2007/10/08 16:21:53	38
@@ -1,5 +1,5 @@
 /*
- *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_ppc.c,v 1.59 2006/06/24 21:47:23 debug Exp $
+ *  $Id: cpu_ppc.c,v 1.68 2007/03/26 02:01:36 debug Exp $
  *
  *  PowerPC/POWER CPU emulation.
  */
@@ -37,6 +37,7 @@
 
 #include "cpu.h"
 #include "devices.h"
+#include "interrupt.h"
 #include "machine.h"
 #include "memory.h"
 #include "misc.h"
@@ -46,6 +47,7 @@
 #include "ppc_pte.h"
 #include "ppc_spr.h"
 #include "ppc_spr_strings.h"
+#include "settings.h"
 #include "symbol.h"
 
 #define	DYNTRANS_DUALMODE_32
@@ -55,6 +57,9 @@
 void ppc_pc_to_pointers(struct cpu *);
 void ppc32_pc_to_pointers(struct cpu *);
 
+void ppc_irq_interrupt_assert(struct interrupt *interrupt);
+void ppc_irq_interrupt_deassert(struct interrupt *interrupt);
+
 
 /*
  *  ppc_cpu_new():
@@ -86,10 +91,10 @@
 
 	cpu->memory_rw = ppc_memory_rw;
 
-	cpu->cd.ppc.cpu_type    = cpu_type_defs[found];
-	cpu->name               = cpu->cd.ppc.cpu_type.name;
-	cpu->byte_order         = EMUL_BIG_ENDIAN;
-	cpu->cd.ppc.mode        = MODE_PPC;	/*  TODO  */
+	cpu->cd.ppc.cpu_type = cpu_type_defs[found];
+	cpu->name            = cpu->cd.ppc.cpu_type.name;
+	cpu->byte_order      = EMUL_BIG_ENDIAN;
+	cpu->cd.ppc.mode     = MODE_PPC;	/*  TODO  */
 
 	/*  Current operating mode:  */
 	cpu->cd.ppc.bits = cpu->cd.ppc.cpu_type.bits;
@@ -116,12 +121,14 @@
 	cpu->is_32bit = (cpu->cd.ppc.bits == 32)? 1 : 0;
 
 	if (cpu->is_32bit) {
+		cpu->run_instr = ppc32_run_instr;
 		cpu->update_translation_table = ppc32_update_translation_table;
 		cpu->invalidate_translation_caches =
 		    ppc32_invalidate_translation_caches;
 		cpu->invalidate_code_translation =
 		    ppc32_invalidate_code_translation;
 	} else {
+		cpu->run_instr = ppc_run_instr;
 		cpu->update_translation_table = ppc_update_translation_table;
 		cpu->invalidate_translation_caches =
 		    ppc_invalidate_translation_caches;
@@ -166,6 +173,66 @@
 	if (cpu->machine->prom_emulation)
 		cpu->cd.ppc.of_emul_addr = 0xfff00000;
 
+	/*  Add all register names to the settings:  */
+	CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc);
+	CPU_SETTINGS_ADD_REGISTER64("msr", cpu->cd.ppc.msr);
+	CPU_SETTINGS_ADD_REGISTER64("ctr", cpu->cd.ppc.spr[SPR_CTR]);
+	CPU_SETTINGS_ADD_REGISTER64("xer", cpu->cd.ppc.spr[SPR_XER]);
+	CPU_SETTINGS_ADD_REGISTER64("dec", cpu->cd.ppc.spr[SPR_DEC]);
+	CPU_SETTINGS_ADD_REGISTER64("hdec", cpu->cd.ppc.spr[SPR_HDEC]);
+	CPU_SETTINGS_ADD_REGISTER64("srr0", cpu->cd.ppc.spr[SPR_SRR0]);
+	CPU_SETTINGS_ADD_REGISTER64("srr1", cpu->cd.ppc.spr[SPR_SRR1]);
+	CPU_SETTINGS_ADD_REGISTER64("sdr1", cpu->cd.ppc.spr[SPR_SDR1]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat0u", cpu->cd.ppc.spr[SPR_IBAT0U]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat0l", cpu->cd.ppc.spr[SPR_IBAT0L]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat1u", cpu->cd.ppc.spr[SPR_IBAT1U]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat1l", cpu->cd.ppc.spr[SPR_IBAT1L]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat2u", cpu->cd.ppc.spr[SPR_IBAT2U]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat2l", cpu->cd.ppc.spr[SPR_IBAT2L]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat3u", cpu->cd.ppc.spr[SPR_IBAT3U]);
+	CPU_SETTINGS_ADD_REGISTER64("ibat3l", cpu->cd.ppc.spr[SPR_IBAT3L]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat0u", cpu->cd.ppc.spr[SPR_DBAT0U]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat0l", cpu->cd.ppc.spr[SPR_DBAT0L]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat1u", cpu->cd.ppc.spr[SPR_DBAT1U]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat1l", cpu->cd.ppc.spr[SPR_DBAT1L]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat2u", cpu->cd.ppc.spr[SPR_DBAT2U]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat2l", cpu->cd.ppc.spr[SPR_DBAT2L]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat3u", cpu->cd.ppc.spr[SPR_DBAT3U]);
+	CPU_SETTINGS_ADD_REGISTER64("dbat3l", cpu->cd.ppc.spr[SPR_DBAT3L]);
+	CPU_SETTINGS_ADD_REGISTER64("lr", cpu->cd.ppc.spr[SPR_LR]);
+	CPU_SETTINGS_ADD_REGISTER32("cr", cpu->cd.ppc.cr);
+	CPU_SETTINGS_ADD_REGISTER32("fpscr", cpu->cd.ppc.fpscr);
+	/*  Integer GPRs, floating point registers, and segment registers:  */
+	for (i=0; i<PPC_NGPRS; i++) {
+		char tmpstr[5];
+		snprintf(tmpstr, sizeof(tmpstr), "r%i", i);
+		CPU_SETTINGS_ADD_REGISTER64(tmpstr, cpu->cd.ppc.gpr[i]);
+	}
+	for (i=0; i<PPC_NFPRS; i++) {
+		char tmpstr[5];
+		snprintf(tmpstr, sizeof(tmpstr), "f%i", i);
+		CPU_SETTINGS_ADD_REGISTER64(tmpstr, cpu->cd.ppc.fpr[i]);
+	}
+	for (i=0; i<16; i++) {
+		char tmpstr[5];
+		snprintf(tmpstr, sizeof(tmpstr), "sr%i", i);
+		CPU_SETTINGS_ADD_REGISTER32(tmpstr, cpu->cd.ppc.sr[i]);
+	}
+
+	/*  Register the CPU as an interrupt handler:  */
+	{
+		struct interrupt template;
+		char name[150];
+		snprintf(name, sizeof(name), "%s", cpu->path);
+		memset(&template, 0, sizeof(template));
+		template.line = 0;
+		template.name = name;
+		template.extra = cpu;
+		template.interrupt_assert = ppc_irq_interrupt_assert;
+		template.interrupt_deassert = ppc_irq_interrupt_deassert;
+		interrupt_handler_register(&template);
+	}
+
 	return 1;
 }
 
@@ -270,7 +337,8 @@
 		*valuep = cpu->cd.ppc.msr;
 
 	if (check_for_interrupts && cpu->cd.ppc.msr & PPC_MSR_EE) {
-		if (cpu->cd.ppc.dec_intr_pending) {
+		if (cpu->cd.ppc.dec_intr_pending &&
+		    !(cpu->cd.ppc.cpu_type.flags & PPC_NO_DEC)) {
 			ppc_exception(cpu, PPC_EXCEPTION_DEC);
 			cpu->cd.ppc.dec_intr_pending = 0;
 		} else if (cpu->cd.ppc.irq_asserted)
@@ -477,7 +545,7 @@
 		for (i=0; i<16; i++) {
 			uint32_t s = cpu->cd.ppc.sr[i];
 			debug("cpu%i:", x);
-			debug("  sr%2i = 0x%08x", i, (int)s);
+			debug("  sr%-2i = 0x%08x", i, (int)s);
 			s &= (SR_TYPE | SR_SUKEY | SR_PRKEY | SR_NOEXEC);
 			if (s != 0) {
 				debug("  (");
@@ -510,95 +578,6 @@
 
 
 /*
- *  ppc_cpu_register_match():
- */
-void ppc_cpu_register_match(struct machine *m, char *name,
-	int writeflag, uint64_t *valuep, int *match_register)
-{
-	int cpunr = 0;
-
-	/*  CPU number:  */
-
-	/*  TODO  */
-
-	/*  Register name:  */
-	if (strcasecmp(name, "pc") == 0) {
-		if (writeflag) {
-			m->cpus[cpunr]->pc = *valuep;
-		} else
-			*valuep = m->cpus[cpunr]->pc;
-		*match_register = 1;
-	} else if (strcasecmp(name, "msr") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.msr = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.msr;
-		*match_register = 1;
-	} else if (strcasecmp(name, "lr") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.spr[SPR_LR] = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_LR];
-		*match_register = 1;
-	} else if (strcasecmp(name, "cr") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.cr = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.cr;
-		*match_register = 1;
-	} else if (strcasecmp(name, "dec") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.spr[SPR_DEC] = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_DEC];
-		*match_register = 1;
-	} else if (strcasecmp(name, "hdec") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.spr[SPR_HDEC] = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_HDEC];
-		*match_register = 1;
-	} else if (strcasecmp(name, "ctr") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.spr[SPR_CTR] = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_CTR];
-		*match_register = 1;
-	} else if (name[0] == 'r' && isdigit((int)name[1])) {
-		int nr = atoi(name + 1);
-		if (nr >= 0 && nr < PPC_NGPRS) {
-			if (writeflag) {
-				m->cpus[cpunr]->cd.ppc.gpr[nr] = *valuep;
-			} else
-				*valuep = m->cpus[cpunr]->cd.ppc.gpr[nr];
-			*match_register = 1;
-		}
-	} else if (strcasecmp(name, "xer") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.spr[SPR_XER] = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.spr[SPR_XER];
-		*match_register = 1;
-	} else if (strcasecmp(name, "fpscr") == 0) {
-		if (writeflag)
-			m->cpus[cpunr]->cd.ppc.fpscr = *valuep;
-		else
-			*valuep = m->cpus[cpunr]->cd.ppc.fpscr;
-		*match_register = 1;
-	} else if (name[0] == 'f' && isdigit((int)name[1])) {
-		int nr = atoi(name + 1);
-		if (nr >= 0 && nr < PPC_NFPRS) {
-			if (writeflag) {
-				m->cpus[cpunr]->cd.ppc.fpr[nr] = *valuep;
-			} else
-				*valuep = m->cpus[cpunr]->cd.ppc.fpr[nr];
-			*match_register = 1;
-		}
-	}
-}
-
-
-/*
  *  ppc_cpu_tlbdump():
  *
  *  Not currently used for PPC.
@@ -608,132 +587,23 @@
 }
 
 
-static void add_response_word(struct cpu *cpu, char *r, uint64_t value,
-	size_t maxlen, int len)
-{
-	char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64;
-	if (len == 4)
-		value &= 0xffffffffULL;
-	if (cpu->byte_order == EMUL_LITTLE_ENDIAN) {
-		if (len == 4) {
-			value = ((value & 0xff) << 24) +
-				((value & 0xff00) << 8) +
-				((value & 0xff0000) >> 8) +
-				((value & 0xff000000) >> 24);
-		} else {
-			value = ((value & 0xff) << 56) +
-				((value & 0xff00) << 40) +
-				((value & 0xff0000) << 24) +
-				((value & 0xff000000ULL) << 8) +
-				((value & 0xff00000000ULL) >> 8) +
-				((value & 0xff0000000000ULL) >> 24) +
-				((value & 0xff000000000000ULL) >> 40) +
-				((value & 0xff00000000000000ULL) >> 56);
-		}
-	}
-	snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value);
-}
-
-
 /*
- *  ppc_cpu_gdb_stub():
- *
- *  Execute a "remote GDB" command. Returns a newly allocated response string
- *  on success, NULL on failure.
+ *  ppc_irq_interrupt_assert():
  */
-char *ppc_cpu_gdb_stub(struct cpu *cpu, char *cmd)
+void ppc_irq_interrupt_assert(struct interrupt *interrupt)
 {
-	if (strcmp(cmd, "g") == 0) {
-		int i;
-		char *r;
-		size_t wlen = cpu->is_32bit?
-		    sizeof(uint32_t) : sizeof(uint64_t);
-		size_t len = 1 + 76 * wlen;
-		r = malloc(len);
-		if (r == NULL) {
-			fprintf(stderr, "out of memory\n");
-			exit(1);
-		}
-		r[0] = '\0';
-		for (i=0; i<128; i++)
-			add_response_word(cpu, r, i, len, wlen);
-		return r;
-	}
-
-	if (cmd[0] == 'p') {
-		int regnr = strtol(cmd + 1, NULL, 16);
-		size_t wlen = cpu->is_32bit?
-		    sizeof(uint32_t) : sizeof(uint64_t);
-		size_t len = 2 * wlen + 1;
-		char *r = malloc(len);
-		r[0] = '\0';
-		if (regnr >= 0 && regnr <= 31) {
-			add_response_word(cpu, r,
-			    cpu->cd.ppc.gpr[regnr], len, wlen);
-		} else if (regnr == 0x40) {
-			add_response_word(cpu, r, cpu->pc, len, wlen);
-		} else if (regnr == 0x42) {
-			add_response_word(cpu, r, cpu->cd.ppc.cr, len, wlen);
-		} else if (regnr == 0x43) {
-			add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_LR],
-			    len, wlen);
-		} else if (regnr == 0x44) {
-			add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_CTR],
-			    len, wlen);
-		} else if (regnr == 0x45) {
-			add_response_word(cpu, r, cpu->cd.ppc.spr[SPR_XER],
-			    len, wlen);
-		} else {
-			/*  Unimplemented:  */
-			add_response_word(cpu, r, 0xcc000 + regnr, len, wlen);
-		}
-		return r;
-	}
-
-	fatal("ppc_cpu_gdb_stub(): TODO\n");
-	return NULL;
+	struct cpu *cpu = (struct cpu *) interrupt->extra;
+	cpu->cd.ppc.irq_asserted = 1;
 }
 
 
 /*
- *  ppc_cpu_interrupt():
- *
- *  0..31 are used as BeBox interrupt numbers, 32..47 = ISA,
- *  64 is used as a "re-assert" signal to cpu->machine->md_interrupt().
- *
- *  TODO: don't hardcode to BeBox!
+ *  ppc_irq_interrupt_deassert():
  */
-int ppc_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
+void ppc_irq_interrupt_deassert(struct interrupt *interrupt)
 {
-	/*  fatal("ppc_cpu_interrupt(): 0x%x\n", (int)irq_nr);  */
-	if (irq_nr <= 64) {
-		if (cpu->machine->md_interrupt != NULL)
-			cpu->machine->md_interrupt(
-			    cpu->machine, cpu, irq_nr, 1);
-		else
-			fatal("ppc_cpu_interrupt(): md_interrupt == NULL\n");
-	} else {
-		/*  Assert PPC IRQ:  */
-		cpu->cd.ppc.irq_asserted = 1;
-	}
-	return 1;
-}
-
-
-/*
- *  ppc_cpu_interrupt_ack():
- */
-int ppc_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
-{
-	if (irq_nr <= 64) {
-		if (cpu->machine->md_interrupt != NULL)
-			cpu->machine->md_interrupt(cpu->machine,
-			    cpu, irq_nr, 0);
-	} else {
-		/*  De-assert PPC IRQ:  */
-		cpu->cd.ppc.irq_asserted = 0;
-	}
-	return 1;
+	struct cpu *cpu = (struct cpu *) interrupt->extra;
+	cpu->cd.ppc.irq_asserted = 0;
 }