/[gxemul]/trunk/src/cpus/cpu_mips_instr_loadstore.c
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Diff of /trunk/src/cpus/cpu_mips_instr_loadstore.c

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revision 41 by dpavlin, Mon Oct 8 16:21:17 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_mips_instr_loadstore.c,v 1.13 2006/12/30 13:30:54 debug Exp $   *  $Id: cpu_mips_instr_loadstore.c,v 1.14 2007/05/02 08:26:12 debug Exp $
29   *   *
30   *  MIPS load/store instructions; the following args are used:   *  MIPS load/store instructions; the following args are used:
31   *     *  
# Line 59  void LS_GENERIC_N(struct cpu *cpu, struc Line 59  void LS_GENERIC_N(struct cpu *cpu, struc
59  #ifndef LS_1  #ifndef LS_1
60          /*  Check alignment:  */          /*  Check alignment:  */
61          if (addr & (LS_SIZE - 1)) {          if (addr & (LS_SIZE - 1)) {
62                  fatal("TODO: mips dyntrans alignment exception, size = %i,"  #if 1
63                      " addr = %016"PRIx64", pc = %016"PRIx64"\n", LS_SIZE,                  /*  Cause an address alignment exception:  */
64                    mips_cpu_exception(cpu,
65    #ifdef LS_LOAD
66                        EXCEPTION_ADEL,
67    #else
68                        EXCEPTION_ADES,
69    #endif
70                        0, addr, 0, 0, 0, 0);
71    #else
72                    fatal("{ mips dyntrans alignment exception, size = %i,"
73                        " addr = %016"PRIx64", pc = %016"PRIx64" }\n", LS_SIZE,
74                      (uint64_t) addr, cpu->pc);                      (uint64_t) addr, cpu->pc);
75    
76                  /*  TODO: Generalize this into a abort_call, or similar:  */                  /*  TODO: Generalize this into a abort_call, or similar:  */
77                  cpu->running = 0;                  cpu->running = 0;
78                  debugger_n_steps_left_before_interaction = 0;                  debugger_n_steps_left_before_interaction = 0;
79                  cpu->cd.mips.next_ic = &nothing_call;                  cpu->cd.mips.next_ic = &nothing_call;
80    #endif
81                  return;                  return;
82          }          }
83  #endif  #endif

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