25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_mips_coproc.c,v 1.62 2007/02/03 16:18:56 debug Exp $ |
* $Id: cpu_mips_coproc.c,v 1.64 2007/04/28 09:19:51 debug Exp $ |
29 |
* |
* |
30 |
* Emulation of MIPS coprocessors. |
* Emulation of MIPS coprocessors. |
31 |
*/ |
*/ |
535 |
* |
* |
536 |
* Note: In the R3000 case, the asid argument is shifted 6 bits. |
* Note: In the R3000 case, the asid argument is shifted 6 bits. |
537 |
*/ |
*/ |
538 |
static void invalidate_asid(struct cpu *cpu, int asid) |
static void invalidate_asid(struct cpu *cpu, unsigned int asid) |
539 |
{ |
{ |
540 |
struct mips_coproc *cp = cpu->cd.mips.coproc[0]; |
struct mips_coproc *cp = cpu->cd.mips.coproc[0]; |
541 |
int i, ntlbs = cp->nr_of_tlbs; |
unsigned int i, ntlbs = cp->nr_of_tlbs; |
542 |
struct mips_tlb *tlb = cp->tlbs; |
struct mips_tlb *tlb = cp->tlbs; |
543 |
|
|
544 |
if (cpu->cd.mips.cpu_type.mmu_model == MMU3K) { |
if (cpu->cd.mips.cpu_type.mmu_model == MMU3K) { |
683 |
int readonly = 0; |
int readonly = 0; |
684 |
uint64_t tmp = *ptr; |
uint64_t tmp = *ptr; |
685 |
uint64_t tmp2 = 0, old; |
uint64_t tmp2 = 0, old; |
686 |
int inval = 0, old_asid, oldmode; |
int inval = 0; |
687 |
|
unsigned int old_asid; |
688 |
|
uint64_t oldmode; |
689 |
|
|
690 |
switch (cp->coproc_nr) { |
switch (cp->coproc_nr) { |
691 |
case 0: |
case 0: |
1802 |
int pfn_shift = 12, vpn_shift = 12; |
int pfn_shift = 12, vpn_shift = 12; |
1803 |
int wf0, wf1, mask; |
int wf0, wf1, mask; |
1804 |
uint64_t vaddr0, vaddr1, paddr0, paddr1, ptmp; |
uint64_t vaddr0, vaddr1, paddr0, paddr1, ptmp; |
1805 |
|
uint64_t psize; |
1806 |
|
|
1807 |
cp->tlbs[index].mask = cp->reg[COP0_PAGEMASK]; |
cp->tlbs[index].mask = cp->reg[COP0_PAGEMASK]; |
1808 |
cp->tlbs[index].hi = cp->reg[COP0_ENTRYHI]; |
cp->tlbs[index].hi = cp->reg[COP0_ENTRYHI]; |
1841 |
} |
} |
1842 |
|
|
1843 |
paddr0 = ((cp->tlbs[index].lo0 & ENTRYLO_PFN_MASK) |
paddr0 = ((cp->tlbs[index].lo0 & ENTRYLO_PFN_MASK) |
1844 |
>> ENTRYLO_PFN_SHIFT) << pfn_shift; |
>> ENTRYLO_PFN_SHIFT) << pfn_shift |
1845 |
|
>> vpn_shift << vpn_shift; |
1846 |
paddr1 = ((cp->tlbs[index].lo1 & ENTRYLO_PFN_MASK) |
paddr1 = ((cp->tlbs[index].lo1 & ENTRYLO_PFN_MASK) |
1847 |
>> ENTRYLO_PFN_SHIFT) << pfn_shift; |
>> ENTRYLO_PFN_SHIFT) << pfn_shift |
1848 |
|
>> vpn_shift << vpn_shift; |
1849 |
|
|
1850 |
if (cpu->cd.mips.cpu_type.mmu_model == MMU10K) { |
if (cpu->cd.mips.cpu_type.mmu_model == MMU10K) { |
1851 |
vaddr0 = cp->tlbs[index].hi & |
vaddr0 = cp->tlbs[index].hi & |
1888 |
* Invalidate any code translations, if we are writing Dirty |
* Invalidate any code translations, if we are writing Dirty |
1889 |
* pages to the TLB: (TODO: 4KB hardcoded... ugly) |
* pages to the TLB: (TODO: 4KB hardcoded... ugly) |
1890 |
*/ |
*/ |
1891 |
for (ptmp = 0; ptmp < (1 << pfn_shift); ptmp += 0x1000) { |
psize = 1 << pfn_shift; |
1892 |
|
for (ptmp = 0; ptmp < psize; ptmp += 0x1000) { |
1893 |
if (wf0) |
if (wf0) |
1894 |
cpu->invalidate_code_translation(cpu, |
cpu->invalidate_code_translation(cpu, |
1895 |
paddr0 + ptmp, INVALIDATE_PADDR); |
paddr0 + ptmp, INVALIDATE_PADDR); |