/[gxemul]/trunk/src/cpus/cpu_mips.c
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revision 26 by dpavlin, Mon Oct 8 16:20:10 2007 UTC revision 30 by dpavlin, Mon Oct 8 16:20:40 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_mips.c,v 1.58 2006/06/24 21:47:23 debug Exp $   *  $Id: cpu_mips.c,v 1.63 2006/08/12 11:43:13 debug Exp $
29   *   *
30   *  MIPS core CPU emulation.   *  MIPS core CPU emulation.
31   */   */
# Line 35  Line 35 
35  #include <string.h>  #include <string.h>
36  #include <sys/types.h>  #include <sys/types.h>
37  #include <ctype.h>  #include <ctype.h>
38    #include <unistd.h>
39    
40  #include "../../config.h"  #include "../../config.h"
41    
# Line 144  int mips_cpu_new(struct cpu *cpu, struct Line 145  int mips_cpu_new(struct cpu *cpu, struct
145                  cpu->is_32bit = 1;                  cpu->is_32bit = 1;
146    
147          if (cpu->is_32bit) {          if (cpu->is_32bit) {
148                    cpu->run_instr = mips32_run_instr;
149                  cpu->update_translation_table = mips32_update_translation_table;                  cpu->update_translation_table = mips32_update_translation_table;
150                  cpu->invalidate_translation_caches =                  cpu->invalidate_translation_caches =
151                      mips32_invalidate_translation_caches;                      mips32_invalidate_translation_caches;
152                  cpu->invalidate_code_translation =                  cpu->invalidate_code_translation =
153                      mips32_invalidate_code_translation;                      mips32_invalidate_code_translation;
154          } else {          } else {
155                    cpu->run_instr = mips_run_instr;
156                  cpu->update_translation_table = mips_update_translation_table;                  cpu->update_translation_table = mips_update_translation_table;
157                  cpu->invalidate_translation_caches =                  cpu->invalidate_translation_caches =
158                      mips_invalidate_translation_caches;                      mips_invalidate_translation_caches;
# Line 747  void mips_cpu_register_match(struct mach Line 750  void mips_cpu_register_match(struct mach
750          }          }
751    
752          /*  TODO: Coprocessor 1,2,3 registers.  */          /*  TODO: Coprocessor 1,2,3 registers.  */
753    
754            /*  Only return lowest 32 bits when doing 32-bit emulation:  */
755            if (!writeflag && m->cpus[cpunr]->is_32bit)
756                    *valuep = (uint32_t) (*valuep);
757  }  }
758    
759    
# Line 1597  void mips_cpu_register_dump(struct cpu * Line 1604  void mips_cpu_register_dump(struct cpu *
1604                  }                  }
1605    
1606                  /*  Coprocessor registers:  */                  /*  Coprocessor registers:  */
                 /*  TODO: multiple selections per register?  */  
1607                  for (i=0; i<32; i++) {                  for (i=0; i<32; i++) {
1608                          /*  32-bit:  */                          /*  32-bit:  */
1609                          if ((i & nm1) == 0)                          if ((i & nm1) == 0)
# Line 1873  void mips_cpu_exception(struct cpu *cpu, Line 1879  void mips_cpu_exception(struct cpu *cpu,
1879          uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0];          uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0];
1880          int exc_model = cpu->cd.mips.cpu_type.exc_model;          int exc_model = cpu->cd.mips.cpu_type.exc_model;
1881    
1882            if (cpu->is_halted) {
1883                    /*
1884                     *  If the exception occurred on a 'wait' instruction, then let
1885                     *  the instruction following the wait instruction be the one
1886                     *  we continue at when the interrupt service routine returns.
1887                     */
1888                    cpu->is_halted = 0;
1889                    cpu->pc += sizeof(uint32_t);
1890            }
1891    
1892          if (!quiet_mode) {          if (!quiet_mode) {
1893                  uint64_t offset;                  uint64_t offset;
1894                  int x;                  int x;
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