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* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
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* |
* |
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* $Id: cpu_mips.c,v 1.83 2007/06/15 18:07:08 debug Exp $ |
* $Id: cpu_mips.c,v 1.84 2007/06/28 13:36:46 debug Exp $ |
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* |
* |
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* MIPS core CPU emulation. |
* MIPS core CPU emulation. |
31 |
*/ |
*/ |
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#include "opcodes_mips.h" |
#include "opcodes_mips.h" |
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#include "settings.h" |
#include "settings.h" |
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#include "symbol.h" |
#include "symbol.h" |
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#include "timer.h" |
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56 |
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extern int native_code_translation_enabled; |
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static char *exception_names[] = EXCEPTION_NAMES; |
static char *exception_names[] = EXCEPTION_NAMES; |
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static char *hi6_names[] = HI6_NAMES; |
static char *hi6_names[] = HI6_NAMES; |
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CPU_SETTINGS_ADD_REGISTER64(cop0_names[i], |
CPU_SETTINGS_ADD_REGISTER64(cop0_names[i], |
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cpu->cd.mips.coproc[0]->reg[i]); |
cpu->cd.mips.coproc[0]->reg[i]); |
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if (native_code_translation_enabled) |
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cpu->sampling_timer = timer_add(CPU_SAMPLE_TIMER_HZ, |
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mips_timer_sample_tick, cpu); |
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337 |
return 1; |
return 1; |
338 |
} |
} |
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