--- trunk/src/cpus/cpu_mips.c 2007/10/08 16:20:32 29 +++ trunk/src/cpus/cpu_mips.c 2007/10/08 16:20:40 30 @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_mips.c,v 1.61 2006/07/16 13:32:26 debug Exp $ + * $Id: cpu_mips.c,v 1.63 2006/08/12 11:43:13 debug Exp $ * * MIPS core CPU emulation. */ @@ -35,6 +35,7 @@ #include #include #include +#include #include "../../config.h" @@ -1878,6 +1879,16 @@ uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0]; int exc_model = cpu->cd.mips.cpu_type.exc_model; + if (cpu->is_halted) { + /* + * If the exception occurred on a 'wait' instruction, then let + * the instruction following the wait instruction be the one + * we continue at when the interrupt service routine returns. + */ + cpu->is_halted = 0; + cpu->pc += sizeof(uint32_t); + } + if (!quiet_mode) { uint64_t offset; int x;