/[gxemul]/trunk/src/cpus/cpu_mips.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 27 by dpavlin, Mon Oct 8 16:20:10 2007 UTC revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_mips.c,v 1.58 2006/06/24 21:47:23 debug Exp $   *  $Id: cpu_mips.c,v 1.61 2006/07/16 13:32:26 debug Exp $
29   *   *
30   *  MIPS core CPU emulation.   *  MIPS core CPU emulation.
31   */   */
# Line 144  int mips_cpu_new(struct cpu *cpu, struct Line 144  int mips_cpu_new(struct cpu *cpu, struct
144                  cpu->is_32bit = 1;                  cpu->is_32bit = 1;
145    
146          if (cpu->is_32bit) {          if (cpu->is_32bit) {
147                    cpu->run_instr = mips32_run_instr;
148                  cpu->update_translation_table = mips32_update_translation_table;                  cpu->update_translation_table = mips32_update_translation_table;
149                  cpu->invalidate_translation_caches =                  cpu->invalidate_translation_caches =
150                      mips32_invalidate_translation_caches;                      mips32_invalidate_translation_caches;
151                  cpu->invalidate_code_translation =                  cpu->invalidate_code_translation =
152                      mips32_invalidate_code_translation;                      mips32_invalidate_code_translation;
153          } else {          } else {
154                    cpu->run_instr = mips_run_instr;
155                  cpu->update_translation_table = mips_update_translation_table;                  cpu->update_translation_table = mips_update_translation_table;
156                  cpu->invalidate_translation_caches =                  cpu->invalidate_translation_caches =
157                      mips_invalidate_translation_caches;                      mips_invalidate_translation_caches;
# Line 747  void mips_cpu_register_match(struct mach Line 749  void mips_cpu_register_match(struct mach
749          }          }
750    
751          /*  TODO: Coprocessor 1,2,3 registers.  */          /*  TODO: Coprocessor 1,2,3 registers.  */
752    
753            /*  Only return lowest 32 bits when doing 32-bit emulation:  */
754            if (!writeflag && m->cpus[cpunr]->is_32bit)
755                    *valuep = (uint32_t) (*valuep);
756  }  }
757    
758    
# Line 1597  void mips_cpu_register_dump(struct cpu * Line 1603  void mips_cpu_register_dump(struct cpu *
1603                  }                  }
1604    
1605                  /*  Coprocessor registers:  */                  /*  Coprocessor registers:  */
                 /*  TODO: multiple selections per register?  */  
1606                  for (i=0; i<32; i++) {                  for (i=0; i<32; i++) {
1607                          /*  32-bit:  */                          /*  32-bit:  */
1608                          if ((i & nm1) == 0)                          if ((i & nm1) == 0)
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