25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_mips.c,v 1.56 2006/06/22 13:22:41 debug Exp $ |
* $Id: cpu_mips.c,v 1.63 2006/08/12 11:43:13 debug Exp $ |
29 |
* |
* |
30 |
* MIPS core CPU emulation. |
* MIPS core CPU emulation. |
31 |
*/ |
*/ |
35 |
#include <string.h> |
#include <string.h> |
36 |
#include <sys/types.h> |
#include <sys/types.h> |
37 |
#include <ctype.h> |
#include <ctype.h> |
38 |
|
#include <unistd.h> |
39 |
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|
40 |
#include "../../config.h" |
#include "../../config.h" |
41 |
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54 |
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55 |
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56 |
extern volatile int single_step; |
extern volatile int single_step; |
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extern int old_show_trace_tree; |
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extern int old_instruction_trace; |
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extern int old_quiet_mode; |
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extern int quiet_mode; |
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57 |
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58 |
static char *exception_names[] = EXCEPTION_NAMES; |
static char *exception_names[] = EXCEPTION_NAMES; |
59 |
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|
145 |
cpu->is_32bit = 1; |
cpu->is_32bit = 1; |
146 |
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|
147 |
if (cpu->is_32bit) { |
if (cpu->is_32bit) { |
148 |
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cpu->run_instr = mips32_run_instr; |
149 |
cpu->update_translation_table = mips32_update_translation_table; |
cpu->update_translation_table = mips32_update_translation_table; |
150 |
cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
151 |
mips32_invalidate_translation_caches; |
mips32_invalidate_translation_caches; |
152 |
cpu->invalidate_code_translation = |
cpu->invalidate_code_translation = |
153 |
mips32_invalidate_code_translation; |
mips32_invalidate_code_translation; |
154 |
} else { |
} else { |
155 |
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cpu->run_instr = mips_run_instr; |
156 |
cpu->update_translation_table = mips_update_translation_table; |
cpu->update_translation_table = mips_update_translation_table; |
157 |
cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
158 |
mips_invalidate_translation_caches; |
mips_invalidate_translation_caches; |
308 |
|
|
309 |
switch (cpu->cd.mips.cpu_type.mmu_model) { |
switch (cpu->cd.mips.cpu_type.mmu_model) { |
310 |
case MMU3K: |
case MMU3K: |
311 |
cpu->translate_address = translate_address_mmu3k; |
cpu->translate_v2p = translate_v2p_mmu3k; |
312 |
break; |
break; |
313 |
case MMU8K: |
case MMU8K: |
314 |
cpu->translate_address = translate_address_mmu8k; |
cpu->translate_v2p = translate_v2p_mmu8k; |
315 |
break; |
break; |
316 |
case MMU10K: |
case MMU10K: |
317 |
cpu->translate_address = translate_address_mmu10k; |
cpu->translate_v2p = translate_v2p_mmu10k; |
318 |
break; |
break; |
319 |
default: |
default: |
320 |
if (cpu->cd.mips.cpu_type.rev == MIPS_R4100) |
if (cpu->cd.mips.cpu_type.rev == MIPS_R4100) |
321 |
cpu->translate_address = translate_address_mmu4100; |
cpu->translate_v2p = translate_v2p_mmu4100; |
322 |
else |
else |
323 |
cpu->translate_address = translate_address_generic; |
cpu->translate_v2p = translate_v2p_generic; |
324 |
} |
} |
325 |
|
|
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mips_init_64bit_dummy_tables(cpu); |
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|
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|
326 |
return 1; |
return 1; |
327 |
} |
} |
328 |
|
|
750 |
} |
} |
751 |
|
|
752 |
/* TODO: Coprocessor 1,2,3 registers. */ |
/* TODO: Coprocessor 1,2,3 registers. */ |
753 |
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754 |
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/* Only return lowest 32 bits when doing 32-bit emulation: */ |
755 |
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if (!writeflag && m->cpus[cpunr]->is_32bit) |
756 |
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*valuep = (uint32_t) (*valuep); |
757 |
} |
} |
758 |
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|
759 |
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|
1604 |
} |
} |
1605 |
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|
1606 |
/* Coprocessor registers: */ |
/* Coprocessor registers: */ |
|
/* TODO: multiple selections per register? */ |
|
1607 |
for (i=0; i<32; i++) { |
for (i=0; i<32; i++) { |
1608 |
/* 32-bit: */ |
/* 32-bit: */ |
1609 |
if ((i & nm1) == 0) |
if ((i & nm1) == 0) |
1879 |
uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0]; |
uint64_t *reg = &cpu->cd.mips.coproc[0]->reg[0]; |
1880 |
int exc_model = cpu->cd.mips.cpu_type.exc_model; |
int exc_model = cpu->cd.mips.cpu_type.exc_model; |
1881 |
|
|
1882 |
|
if (cpu->is_halted) { |
1883 |
|
/* |
1884 |
|
* If the exception occurred on a 'wait' instruction, then let |
1885 |
|
* the instruction following the wait instruction be the one |
1886 |
|
* we continue at when the interrupt service routine returns. |
1887 |
|
*/ |
1888 |
|
cpu->is_halted = 0; |
1889 |
|
cpu->pc += sizeof(uint32_t); |
1890 |
|
} |
1891 |
|
|
1892 |
if (!quiet_mode) { |
if (!quiet_mode) { |
1893 |
uint64_t offset; |
uint64_t offset; |
1894 |
int x; |
int x; |