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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
28 |
* $Id: cpu_mips.c,v 1.56 2006/06/22 13:22:41 debug Exp $ |
* $Id: cpu_mips.c,v 1.58 2006/06/24 21:47:23 debug Exp $ |
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* |
* |
30 |
* MIPS core CPU emulation. |
* MIPS core CPU emulation. |
31 |
*/ |
*/ |
53 |
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extern volatile int single_step; |
extern volatile int single_step; |
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extern int old_show_trace_tree; |
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extern int old_instruction_trace; |
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extern int old_quiet_mode; |
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extern int quiet_mode; |
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56 |
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static char *exception_names[] = EXCEPTION_NAMES; |
static char *exception_names[] = EXCEPTION_NAMES; |
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305 |
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switch (cpu->cd.mips.cpu_type.mmu_model) { |
switch (cpu->cd.mips.cpu_type.mmu_model) { |
307 |
case MMU3K: |
case MMU3K: |
308 |
cpu->translate_address = translate_address_mmu3k; |
cpu->translate_v2p = translate_v2p_mmu3k; |
309 |
break; |
break; |
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case MMU8K: |
case MMU8K: |
311 |
cpu->translate_address = translate_address_mmu8k; |
cpu->translate_v2p = translate_v2p_mmu8k; |
312 |
break; |
break; |
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case MMU10K: |
case MMU10K: |
314 |
cpu->translate_address = translate_address_mmu10k; |
cpu->translate_v2p = translate_v2p_mmu10k; |
315 |
break; |
break; |
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default: |
default: |
317 |
if (cpu->cd.mips.cpu_type.rev == MIPS_R4100) |
if (cpu->cd.mips.cpu_type.rev == MIPS_R4100) |
318 |
cpu->translate_address = translate_address_mmu4100; |
cpu->translate_v2p = translate_v2p_mmu4100; |
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else |
else |
320 |
cpu->translate_address = translate_address_generic; |
cpu->translate_v2p = translate_v2p_generic; |
321 |
} |
} |
322 |
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mips_init_64bit_dummy_tables(cpu); |
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323 |
return 1; |
return 1; |
324 |
} |
} |
325 |
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