25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_m68k_instr.c,v 1.5 2006/02/09 22:40:27 debug Exp $ |
* $Id: cpu_m68k_instr.c,v 1.8 2006/08/21 14:44:22 debug Exp $ |
29 |
* |
* |
30 |
* Motorola 68K instructions. |
* Motorola 68K instructions. |
31 |
* |
* |
77 |
{ |
{ |
78 |
uint32_t addr, low_pc; |
uint32_t addr, low_pc; |
79 |
uint16_t iword; |
uint16_t iword; |
|
#ifdef DYNTRANS_BACKEND |
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int simple = 0; |
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#endif |
|
80 |
unsigned char *page; |
unsigned char *page; |
81 |
unsigned char ib[2]; |
unsigned char ib[2]; |
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int main_opcode; |
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82 |
/* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/ |
/* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/ |
83 |
|
|
84 |
/* Figure out the (virtual) address of the instruction: */ |
/* Figure out the (virtual) address of the instruction: */ |
106 |
} |
} |
107 |
} |
} |
108 |
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|
109 |
iword = *((uint16_t *)&ib[0]); |
iword = (ib[0] << 8) + ib[1]; |
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|
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#ifdef HOST_LITTLE_ENDIAN |
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iword = ((iword & 0xff) << 8) | |
|
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((iword & 0xff00) >> 8); |
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#endif |
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fatal("M68K: iword = 0x%04x\n", iword); |
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110 |
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|
111 |
|
|
112 |
#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
116 |
|
|
117 |
/* |
/* |
118 |
* Translate the instruction: |
* Translate the instruction: |
119 |
|
* |
120 |
|
* NOTE: The instruction length is assumed to be 2 bytes (1 slot) |
121 |
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* if nothing else is specified. |
122 |
*/ |
*/ |
123 |
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ic->arg[0] = 1; |
124 |
|
|
125 |
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switch (iword >> 12) { |
126 |
|
|
127 |
/* TODO */ |
case 0x4: |
128 |
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switch ((iword >> 8) & 0xf) { |
129 |
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130 |
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case 0xe: |
131 |
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if ((iword & 0xff) == 0x71) { |
132 |
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ic->f = instr(nop); |
133 |
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break; |
134 |
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} |
135 |
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goto bad; |
136 |
|
|
137 |
main_opcode = iword; |
default:goto bad; |
138 |
|
} |
139 |
switch (main_opcode) { |
break; |
140 |
|
|
141 |
default:goto bad; |
default:goto bad; |
142 |
} |
} |