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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_m68k_instr.c,v 1.2 2005/09/17 17:14:27 debug Exp $ |
* $Id: cpu_m68k_instr.c,v 1.8 2006/08/21 14:44:22 debug Exp $ |
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* |
* |
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* Motorola 68K instructions. |
* Motorola 68K instructions. |
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* |
* |
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* Individual functions should keep track of cpu->n_translated_instrs. Since |
* Individual functions should keep track of cpu->n_translated_instrs. |
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* M68K uses variable length instructions, cpu->cd.m68k.next_ic must also be |
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* increased by the number of "instruction slots" that were executed. (I.e. |
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* if an instruction occupying 6 bytes was executed, then next_ic should be |
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* increased by 3.) |
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* |
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* (n_translated_instrs is automatically increased by 1 for each function |
* (n_translated_instrs is automatically increased by 1 for each function |
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* call. If no instruction was executed, then it should be decreased. If, say, |
* call. If no instruction was executed, then it should be decreased. If, say, |
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* 4 instructions were combined into one function and executed, then it should |
* 4 instructions were combined into one function and executed, then it should |
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*/ |
*/ |
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X(nop) |
X(nop) |
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{ |
{ |
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cpu->cd.m68k.next_ic ++; |
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} |
} |
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/* |
/* |
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* m68k_combine_instructions(): |
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* |
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* Combine two or more instructions, if possible, into a single function call. |
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*/ |
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void m68k_combine_instructions(struct cpu *cpu, struct m68k_instr_call *ic, |
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uint32_t addr) |
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{ |
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int n_back; |
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n_back = (addr >> 1) & (M68K_IC_ENTRIES_PER_PAGE-1); |
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if (n_back >= 1) { |
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/* TODO */ |
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} |
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/* TODO: Combine forward as well */ |
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} |
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/*****************************************************************************/ |
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/* |
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* m68k_instr_to_be_translated(): |
* m68k_instr_to_be_translated(): |
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* |
* |
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* Translate an instruction word into an m68k_instr_call. ic is filled in with |
* Translate an instruction word into an m68k_instr_call. ic is filled in with |
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uint16_t iword; |
uint16_t iword; |
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unsigned char *page; |
unsigned char *page; |
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unsigned char ib[2]; |
unsigned char ib[2]; |
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int main_opcode; |
/* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/ |
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void (*samepage_function)(struct cpu *, struct m68k_instr_call *); |
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/* Figure out the (virtual) address of the instruction: */ |
/* Figure out the (virtual) address of the instruction: */ |
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low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page) |
low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page) |
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} |
} |
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} |
} |
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iword = *((uint16_t *)&ib[0]); |
iword = (ib[0] << 8) + ib[1]; |
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#ifdef HOST_LITTLE_ENDIAN |
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iword = ((iword & 0xff) << 8) | |
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((iword & 0xff00) >> 8); |
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#endif |
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fatal("M68K: iword = 0x%04x\n", iword); |
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#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
#define DYNTRANS_TO_BE_TRANSLATED_HEAD |
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/* |
/* |
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* Translate the instruction: |
* Translate the instruction: |
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* |
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* NOTE: The instruction length is assumed to be 2 bytes (1 slot) |
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* if nothing else is specified. |
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*/ |
*/ |
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ic->arg[0] = 1; |
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switch (iword >> 12) { |
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/* TODO */ |
case 0x4: |
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switch ((iword >> 8) & 0xf) { |
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main_opcode = iword; |
case 0xe: |
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if ((iword & 0xff) == 0x71) { |
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ic->f = instr(nop); |
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break; |
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} |
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goto bad; |
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switch (main_opcode) { |
default:goto bad; |
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} |
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break; |
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default:goto bad; |
default:goto bad; |
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} |
} |