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++ trunk/HISTORY (local) $Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $ 20051031 Adding disassembly support for more ARM instructions (clz, smul* etc), and adding a hack to support "new tiny" pages for StrongARM. 20051101 Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD 3.7 -> 3.8, and lots of testing). Changing from 1-sector PIO mode 0 transfers to 128-sector PIO mode 3 (in dev_wdc). Various minor ARM dyntrans updates (pc-relative loads from within the same page as the instruction are now treated as constant "mov"). 20051102 Re-enabling instruction combinations (they were accidentally disabled). Dyntrans TLB entries are now overwritten using a round-robin scheme instead of randomly. This increases performance. Fixing a typo in file.c (thanks to Chuan-Hua Chang for noticing it). Experimenting with adding ATAPI support to dev_wdc (to make emulated *BSD detect cdroms as cdroms, not harddisks). 20051104 Various minor updates. 20051105 Continuing on the ATAPI emulation. Seems to work well enough for a NetBSD/cats installation, but not OpenBSD/cats. Various other updates. 20051106 Modifying the -Y command line option to allow scaleup with certain graphic controllers (only dev_vga so far), not just scaledown. Some minor dyntrans cleanups. 20051107 Beginning a cleanup up the PCI subsystem (removing the read_register hack, etc). 20051108 Continuing the cleanup; splitting up some pci devices into a normal autodev device and some separate pci glue code. 20051109 Continuing on the PCI bus stuff; all old pci_*.c have been incorporated into normal devices and/or rewritten as glue code only, adding a dummy Intel 82371AB PIIX4 for Malta (not really tested yet). Minor pckbc fix so that Linux doesn't complain. Working on the DEC 21143 NIC (ethernet mac rom stuff mostly). Various other minor fixes. 20051110 Some more ARM dyntrans fine-tuning (e.g. some instruction combinations (cmps followed by conditional branch within the same page) and special cases for DPIs with regform when the shifter isn't used). 20051111 ARM dyntrans updates: O(n)->O(1) for just-mark-as-non- writable in the generic pc_to_pointers function, and some other minor hacks. Merging Cobalt and evbmips (Malta) ISA interrupt handling, and some minor fixes to allow Linux to accept harddisk irqs. 20051112 Minor device updates (pckbc, dec21143, lpt, ...), most importantly fixing the ALI M1543/M5229 so that harddisk irqs work with Linux/CATS. 20051113 Some more generalizations of the PCI subsystem. Finally took the time to add a hack for SCSI CDROM TOCs; this enables OpenBSD to use partition 'a' (as needed by the OpenBSD installer), and Windows NT's installer to get a bit further. Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs. Continuing on the DEC 21143. 20051114 Minor ARM dyntrans tweaks; ARM cmps+branch optimization when comparing with 0, and generalizing the xchg instr. comb. Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}. 20051115 Continuing on various PPC things (BATs, other address trans- lation things, various loads/stores, BeBox emulation, etc.). Beginning to work on PPC interrupt/exception support. 20051116 Factoring out some code which initializes legacy ISA devices from those machines that use them (bus_isa). Continuing on PPC interrupt/exception support. 20051117 Minor Malta fixes: RTC year offset = 80, disabling a speed hack which caused NetBSD to detect a too fast cpu, and adding a new hack to make Linux detect a faster cpu. Continuing on the Artesyn PM/PPC emulation mode. Adding an Algor emulation skeleton (P4032 and P5064); implementing some of the basics. Continuing on PPC emulation in general; usage of unimplemented SPRs is now easier to track, continuing on memory/exception related issues, etc. 20051118 More work on PPC emulation (tgpr0..3, exception handling, memory stuff, syscalls, etc.). 20051119 Changing the ARM dyntrans code to mostly use cpu->pc, and not necessarily use arm reg 15. Seems to work. Various PPC updates; continuing on the PReP emulation mode. 20051120 Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep to detect the clock. 20051121 More cleanup of the PCI bus (memory and I/O bases, etc). Continuing on various PPC things (decrementer and timebase, WDCs on obio (on PReP) use irq 13, not 14/15). 20051122 Continuing on the CPC700 controller (interrupts etc) for PMPPC, and on PPC stuff in general. Finally! After some bug fixes to the virtual to physical addr translation, NetBSD/{prep,pmppc} 2.1 reach userland and are stable enough to be interacted with. More PCI updates; reverse-endian device access for PowerPC etc. 20051123 Generalizing the IEEE floating point subsystem (moving it out from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c). Input via slave xterms was sometimes not really working; fixing this for ns16550, and a warning message is now displayed if multiple non-xterm consoles are active. Adding some PPC floating point support, etc. Various interrupt related updates (dev_wdc, _ns16550, _8259, and the isa32 common code in machine.c). NetBSD/prep can now be installed! :-) (Well, with some manual commands necessary before running sysinst.) Updating the documentation and various other things to reflect this. 20051124 Various minor documentation updates. Continuing the work on the DEC 21143 NIC. 20051125 LOTS of work on the 21143. Both OpenBSD and NetBSD work fine with it now, except that OpenBSD sometimes gives a time-out warning. Minor documentation updates. ============== RELEASE 0.3.7 ==============
1 | dpavlin | 14 | /* |
2 | * Copyright (C) 2005 Anders Gavare. All rights reserved. | ||
3 | * | ||
4 | * Redistribution and use in source and binary forms, with or without | ||
5 | * modification, are permitted provided that the following conditions are met: | ||
6 | * | ||
7 | * 1. Redistributions of source code must retain the above copyright | ||
8 | * notice, this list of conditions and the following disclaimer. | ||
9 | * 2. Redistributions in binary form must reproduce the above copyright | ||
10 | * notice, this list of conditions and the following disclaimer in the | ||
11 | * documentation and/or other materials provided with the distribution. | ||
12 | * 3. The name of the author may not be used to endorse or promote products | ||
13 | * derived from this software without specific prior written permission. | ||
14 | * | ||
15 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | ||
16 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
17 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
18 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE | ||
19 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | ||
20 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | ||
21 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | ||
22 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | ||
23 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | ||
24 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | ||
25 | * SUCH DAMAGE. | ||
26 | * | ||
27 | * | ||
28 | dpavlin | 20 | * $Id: cpu_m68k_instr.c,v 1.3 2005/11/06 22:41:12 debug Exp $ |
29 | dpavlin | 14 | * |
30 | * Motorola 68K instructions. | ||
31 | * | ||
32 | dpavlin | 20 | * Individual functions should keep track of cpu->n_translated_instrs. |
33 | dpavlin | 14 | * (n_translated_instrs is automatically increased by 1 for each function |
34 | * call. If no instruction was executed, then it should be decreased. If, say, | ||
35 | * 4 instructions were combined into one function and executed, then it should | ||
36 | * be increased by 3.) | ||
37 | */ | ||
38 | |||
39 | |||
40 | /* | ||
41 | * nop: Do nothing. | ||
42 | */ | ||
43 | X(nop) | ||
44 | { | ||
45 | } | ||
46 | |||
47 | |||
48 | /*****************************************************************************/ | ||
49 | |||
50 | |||
51 | X(end_of_page) | ||
52 | { | ||
53 | /* Update the PC: (offset 0, but on the next page) */ | ||
54 | cpu->pc &= ~((M68K_IC_ENTRIES_PER_PAGE-1) << 1); | ||
55 | cpu->pc += (M68K_IC_ENTRIES_PER_PAGE << 1); | ||
56 | |||
57 | /* Find the new physical page and update the translation pointers: */ | ||
58 | m68k_pc_to_pointers(cpu); | ||
59 | |||
60 | /* end_of_page doesn't count as an executed instruction: */ | ||
61 | cpu->n_translated_instrs --; | ||
62 | } | ||
63 | |||
64 | |||
65 | /*****************************************************************************/ | ||
66 | |||
67 | |||
68 | /* | ||
69 | * m68k_instr_to_be_translated(): | ||
70 | * | ||
71 | * Translate an instruction word into an m68k_instr_call. ic is filled in with | ||
72 | * valid data for the translated instruction, or a "nothing" instruction if | ||
73 | * there was a translation failure. The newly translated instruction is then | ||
74 | * executed. | ||
75 | */ | ||
76 | X(to_be_translated) | ||
77 | { | ||
78 | uint32_t addr, low_pc; | ||
79 | uint16_t iword; | ||
80 | unsigned char *page; | ||
81 | unsigned char ib[2]; | ||
82 | int main_opcode; | ||
83 | dpavlin | 20 | /* void (*samepage_function)(struct cpu *, struct m68k_instr_call *);*/ |
84 | dpavlin | 14 | |
85 | /* Figure out the (virtual) address of the instruction: */ | ||
86 | low_pc = ((size_t)ic - (size_t)cpu->cd.m68k.cur_ic_page) | ||
87 | / sizeof(struct m68k_instr_call); | ||
88 | addr = cpu->pc & ~((M68K_IC_ENTRIES_PER_PAGE-1) << | ||
89 | M68K_INSTR_ALIGNMENT_SHIFT); | ||
90 | addr += (low_pc << M68K_INSTR_ALIGNMENT_SHIFT); | ||
91 | cpu->pc = addr; | ||
92 | addr &= ~((1 << M68K_INSTR_ALIGNMENT_SHIFT) - 1); | ||
93 | |||
94 | /* Read the instruction word from memory: */ | ||
95 | page = cpu->cd.m68k.host_load[addr >> 12]; | ||
96 | |||
97 | if (page != NULL) { | ||
98 | /* fatal("TRANSLATION HIT!\n"); */ | ||
99 | memcpy(ib, page + (addr & 0xfff), sizeof(ib)); | ||
100 | } else { | ||
101 | /* fatal("TRANSLATION MISS!\n"); */ | ||
102 | if (!cpu->memory_rw(cpu, cpu->mem, addr, ib, | ||
103 | sizeof(ib), MEM_READ, CACHE_INSTRUCTION)) { | ||
104 | fatal("to_be_translated(): " | ||
105 | "read failed: TODO\n"); | ||
106 | goto bad; | ||
107 | } | ||
108 | } | ||
109 | |||
110 | iword = *((uint16_t *)&ib[0]); | ||
111 | |||
112 | #ifdef HOST_LITTLE_ENDIAN | ||
113 | iword = ((iword & 0xff) << 8) | | ||
114 | ((iword & 0xff00) >> 8); | ||
115 | #endif | ||
116 | |||
117 | |||
118 | fatal("M68K: iword = 0x%04x\n", iword); | ||
119 | |||
120 | |||
121 | #define DYNTRANS_TO_BE_TRANSLATED_HEAD | ||
122 | #include "cpu_dyntrans.c" | ||
123 | #undef DYNTRANS_TO_BE_TRANSLATED_HEAD | ||
124 | |||
125 | |||
126 | /* | ||
127 | * Translate the instruction: | ||
128 | */ | ||
129 | |||
130 | |||
131 | /* TODO */ | ||
132 | |||
133 | |||
134 | main_opcode = iword; | ||
135 | |||
136 | switch (main_opcode) { | ||
137 | |||
138 | default:goto bad; | ||
139 | } | ||
140 | |||
141 | |||
142 | #define DYNTRANS_TO_BE_TRANSLATED_TAIL | ||
143 | #include "cpu_dyntrans.c" | ||
144 | #undef DYNTRANS_TO_BE_TRANSLATED_TAIL | ||
145 | } | ||
146 |
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