/[gxemul]/trunk/src/cpus/cpu_m68k.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/cpus/cpu_m68k.c

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Revision 28 - (hide annotations)
Mon Oct 8 16:20:26 2007 UTC (13 years, 3 months ago) by dpavlin
File MIME type: text/plain
File size: 7796 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 dpavlin 14 /*
2 dpavlin 24 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 dpavlin 14 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 28 * $Id: cpu_m68k.c,v 1.12 2006/07/20 21:52:59 debug Exp $
29 dpavlin 14 *
30     * Motorola 68K CPU emulation.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36     #include <ctype.h>
37    
38     #include "cpu.h"
39     #include "machine.h"
40     #include "memory.h"
41     #include "misc.h"
42     #include "symbol.h"
43    
44    
45     #define DYNTRANS_32
46     #define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
47     #include "tmp_m68k_head.c"
48    
49    
50     static char *m68k_aname[] = { "a0", "a1", "a2", "a3", "a4", "a5", "fp", "a7" };
51    
52    
53     /*
54     * m68k_cpu_new():
55     *
56     * Create a new M68K cpu object.
57     *
58     * Returns 1 on success, 0 if there was no matching M68K processor with
59     * this cpu_type_name.
60     */
61     int m68k_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
62     int cpu_id, char *cpu_type_name)
63     {
64     if (strcasecmp(cpu_type_name, "68020") != 0)
65     return 0;
66    
67 dpavlin 28 cpu->run_instr = m68k_run_instr;
68 dpavlin 14 cpu->memory_rw = m68k_memory_rw;
69     cpu->update_translation_table = m68k_update_translation_table;
70 dpavlin 18 cpu->invalidate_translation_caches =
71     m68k_invalidate_translation_caches;
72 dpavlin 14 cpu->invalidate_code_translation = m68k_invalidate_code_translation;
73     cpu->is_32bit = 1;
74    
75     cpu->byte_order = EMUL_BIG_ENDIAN;
76    
77     /* Only show name and caches etc for CPU nr 0 (in SMP machines): */
78     if (cpu_id == 0) {
79     debug("%s", cpu->name);
80     }
81    
82     return 1;
83     }
84    
85    
86     /*
87     * m68k_cpu_list_available_types():
88     *
89     * Print a list of available M68K CPU types.
90     */
91     void m68k_cpu_list_available_types(void)
92     {
93     debug("68020\n");
94     /* TODO */
95     }
96    
97    
98     /*
99     * m68k_cpu_dumpinfo():
100     */
101     void m68k_cpu_dumpinfo(struct cpu *cpu)
102     {
103     /* TODO */
104     debug("\n");
105     }
106    
107    
108     /*
109     * m68k_cpu_register_dump():
110     *
111     * Dump cpu registers in a relatively readable format.
112     *
113     * gprs: set to non-zero to dump GPRs and some special-purpose registers.
114     * coprocs: set bit 0..3 to dump registers in coproc 0..3.
115     */
116     void m68k_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
117     {
118     char *symbol;
119     uint64_t offset;
120     int x = cpu->cpu_id;
121    
122     if (gprs) {
123     /* Special registers (pc, ...) first: */
124     symbol = get_symbol_name(&cpu->machine->symbol_context,
125     cpu->pc, &offset);
126    
127 dpavlin 28 debug("cpu%i: pc = 0x%08"PRIx32, x, (uint32_t)cpu->pc);
128 dpavlin 14 debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
129     }
130     }
131    
132    
133     /*
134     * m68k_cpu_register_match():
135     */
136     void m68k_cpu_register_match(struct machine *m, char *name,
137     int writeflag, uint64_t *valuep, int *match_register)
138     {
139     int cpunr = 0;
140    
141     /* CPU number: */
142    
143     /* TODO */
144    
145     /* Register name: */
146     if (strcasecmp(name, "pc") == 0) {
147     if (writeflag) {
148     m->cpus[cpunr]->pc = *valuep;
149     } else
150     *valuep = m->cpus[cpunr]->pc;
151     *match_register = 1;
152     }
153     }
154    
155    
156     /*
157 dpavlin 24 * m68k_cpu_tlbdump():
158     *
159     * Called from the debugger to dump the TLB in a readable format.
160     * x is the cpu number to dump, or -1 to dump all CPUs.
161     *
162     * If rawflag is nonzero, then the TLB contents isn't formated nicely,
163     * just dumped.
164     */
165     void m68k_cpu_tlbdump(struct machine *m, int x, int rawflag)
166     {
167     }
168    
169    
170     /*
171     * m68k_cpu_gdb_stub():
172     *
173     * Execute a "remote GDB" command. Returns a newly allocated response string
174     * on success, NULL on failure.
175     */
176     char *m68k_cpu_gdb_stub(struct cpu *cpu, char *cmd)
177     {
178     fatal("m68k_cpu_gdb_stub(): TODO\n");
179     return NULL;
180     }
181    
182    
183     /*
184 dpavlin 14 * m68k_cpu_interrupt():
185     */
186     int m68k_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
187     {
188     fatal("m68k_cpu_interrupt(): TODO\n");
189     return 0;
190     }
191    
192    
193     /*
194     * m68k_cpu_interrupt_ack():
195     */
196     int m68k_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
197     {
198     /* fatal("m68k_cpu_interrupt_ack(): TODO\n"); */
199     return 0;
200     }
201    
202    
203     /* Helper functions: */
204     static void print_two(unsigned char *instr, int *len)
205     { debug(" %02x%02x", instr[*len], instr[*len+1]); (*len) += 2; }
206     static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
207     i++) debug(" "); }
208    
209    
210     /*
211     * m68k_cpu_disassemble_instr():
212     *
213     * Convert an instruction word into human readable format, for instruction
214     * tracing.
215     *
216     * If running is 1, cpu->pc should be the address of the instruction.
217     *
218     * If running is 0, things that depend on the runtime environment (eg.
219     * register contents) will not be shown, and addr will be used instead of
220     * cpu->pc for relative addresses.
221     */
222     int m68k_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
223 dpavlin 24 int running, uint64_t dumpaddr)
224 dpavlin 14 {
225     uint64_t offset;
226     int len = 0;
227     char *symbol;
228    
229     if (running)
230     dumpaddr = cpu->pc;
231    
232     symbol = get_symbol_name(&cpu->machine->symbol_context,
233     dumpaddr, &offset);
234     if (symbol != NULL && offset==0)
235     debug("<%s>\n", symbol);
236    
237     if (cpu->machine->ncpus > 1 && running)
238     debug("cpu%i: ", cpu->cpu_id);
239    
240     debug("0x%08x: ", (int)dumpaddr);
241    
242     print_two(ib, &len);
243    
244     if (ib[0] == 0x48) {
245     if (ib[1] >= 0x40 && ib[1] <= 0x47) {
246     print_spaces(len);
247     debug("swap\td%i\n", ib[1] & 7);
248     } else if (ib[1] >= 0x48 && ib[1] <= 0x4f) {
249     print_spaces(len);
250     debug("bkpt\t#%i\n", ib[1] & 7);
251     } else {
252     print_spaces(len);
253     debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
254     }
255     } else if (ib[0] == 0x4a) {
256     if (ib[1] == 0xfc) {
257     print_spaces(len);
258     debug("illegal\n");
259     } else {
260     print_spaces(len);
261     debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
262     }
263     } else if (ib[0] == 0x4e) {
264     if (ib[1] >= 0x40 && ib[1] <= 0x4f) {
265     print_spaces(len);
266     debug("trap\t#%i\n", ib[1] & 15);
267     } else if (ib[1] >= 0x50 && ib[1] <= 0x57) {
268     print_two(ib, &len);
269     print_spaces(len);
270     debug("linkw\t%%%s,#%i\n", m68k_aname[ib[1] & 7],
271     ((ib[2] << 8) + ib[3]));
272     } else if (ib[1] >= 0x58 && ib[1] <= 0x5f) {
273     print_spaces(len);
274     debug("unlk\t%%%s\n", m68k_aname[ib[1] & 7]);
275     } else if (ib[1] == 0x70) {
276     print_spaces(len);
277     debug("reset\n");
278     } else if (ib[1] == 0x71) {
279     print_spaces(len);
280     debug("nop\n");
281     } else if (ib[1] == 0x72) {
282     print_two(ib, &len);
283     print_spaces(len);
284     debug("stop\t#0x%04x\n", ((ib[2] << 8) + ib[3]));
285     } else if (ib[1] == 0x73) {
286     print_spaces(len);
287     debug("rte\n");
288     } else if (ib[1] == 0x74) {
289     print_two(ib, &len);
290     print_spaces(len);
291     debug("rtd\t#0x%04x\n", ((ib[2] << 8) + ib[3]));
292     } else if (ib[1] == 0x75) {
293     print_spaces(len);
294     debug("rts\n");
295     } else {
296     print_spaces(len);
297     debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
298     }
299     } else {
300     print_spaces(len);
301     debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
302     }
303    
304     return len;
305     }
306    
307    
308     #include "tmp_m68k_tail.c"
309    

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