src/cpus/cpu_i960.c

/*
 *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_i960.c,v 1.11 2006/07/20 21:52:59 debug Exp $
 *
 *  Intel i960 CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "symbol.h"

#define DYNTRANS_32
#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
#include "tmp_i960_head.c"


/*
 *  i960_cpu_new():
 *
 *  Create a new I960 cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching I960 processor with
 *  this cpu_type_name.
 */
int i960_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
        int cpu_id, char *cpu_type_name)
{
        if (strcasecmp(cpu_type_name, "i960") != 0)
                return 0;

        cpu->run_instr = i960_run_instr;
        cpu->memory_rw = i960_memory_rw;
        cpu->update_translation_table = i960_update_translation_table;
        cpu->invalidate_translation_caches =
            i960_invalidate_translation_caches;
        cpu->invalidate_code_translation = i960_invalidate_code_translation;
        cpu->is_32bit = 1;

        cpu->byte_order = EMUL_BIG_ENDIAN;

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        return 1;
}


/*
 *  i960_cpu_list_available_types():
 *
 *  Print a list of available I960 CPU types.
 */
void i960_cpu_list_available_types(void)
{
        debug("i960\n");
        /*  TODO  */
}


/*
 *  i960_cpu_dumpinfo():
 */
void i960_cpu_dumpinfo(struct cpu *cpu)
{
        /*  TODO  */
        debug("\n");
}


/*
 *  i960_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void i960_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset;
        int x = cpu->cpu_id;

        if (gprs) {
                /*  Special registers (pc, ...) first:  */
                symbol = get_symbol_name(&cpu->machine->symbol_context,
                    cpu->pc, &offset);

                debug("cpu%i: pc  = 0x%08"PRIx32, x, (uint32_t)cpu->pc);
                debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");
        }
}


/*
 *  i960_cpu_register_match():
 */
void i960_cpu_register_match(struct machine *m, char *name,
        int writeflag, uint64_t *valuep, int *match_register)
{
        int cpunr = 0;

        /*  CPU number:  */

        /*  TODO  */

        /*  Register name:  */
        if (strcasecmp(name, "pc") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->pc = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->pc;
                *match_register = 1;
        }
}


/*
 *  i960_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void i960_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
}


/*
 *  i960_cpu_gdb_stub():
 *
 *  Execute a "remote GDB" command. Returns a newly allocated response string
 *  on success, NULL on failure.
 */
char *i960_cpu_gdb_stub(struct cpu *cpu, char *cmd)
{
        fatal("i960_cpu_gdb_stub(): TODO\n");
        return NULL;
}


/*
 *  i960_cpu_interrupt():
 */
int i960_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
{
        fatal("i960_cpu_interrupt(): TODO\n");
        return 0;
}


/*
 *  i960_cpu_interrupt_ack():
 */
int i960_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
{
        /*  fatal("i960_cpu_interrupt_ack(): TODO\n");  */
        return 0;
}


/*  Helper functions:  */
static void print_four(unsigned char *instr, int *len)
{ debug(" %02x%02x%02x%02x", instr[*len], instr[*len+1],
        instr[*len+2], instr[*len+3]); (*len) += 4; }
static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
    i++) debug(" "); }


/*
 *  i960_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int i960_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
        int running, uint64_t dumpaddr)
{
        uint64_t offset;
        int len = 0;
        char *symbol;

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

        debug("0x%08x: ", (int)dumpaddr);

        print_four(ib, &len);

        /*  TODO  */
        print_spaces(len);
        debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);

        return len;
}


#include "tmp_i960_tail.c"

1	/*
2	* Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: cpu_i960.c,v 1.11 2006/07/20 21:52:59 debug Exp $
29	*
30	* Intel i960 CPU emulation.
31	*/
32
33	#include <stdio.h>
34	#include <stdlib.h>
35	#include <string.h>
36	#include <ctype.h>
37
38	#include "cpu.h"
39	#include "machine.h"
40	#include "memory.h"
41	#include "misc.h"
42	#include "symbol.h"
43
44	#define DYNTRANS_32
45	#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
46	#include "tmp_i960_head.c"
47
48
49	/*
50	* i960_cpu_new():
51	*
52	* Create a new I960 cpu object.
53	*
54	* Returns 1 on success, 0 if there was no matching I960 processor with
55	* this cpu_type_name.
56	*/
57	int i960_cpu_new(struct cpu cpu, struct memory mem, struct machine *machine,
58	int cpu_id, char *cpu_type_name)
59	{
60	if (strcasecmp(cpu_type_name, "i960") != 0)
61	return 0;
62
63	cpu->run_instr = i960_run_instr;
64	cpu->memory_rw = i960_memory_rw;
65	cpu->update_translation_table = i960_update_translation_table;
66	cpu->invalidate_translation_caches =
67	i960_invalidate_translation_caches;
68	cpu->invalidate_code_translation = i960_invalidate_code_translation;
69	cpu->is_32bit = 1;
70
71	cpu->byte_order = EMUL_BIG_ENDIAN;
72
73	/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
74	if (cpu_id == 0) {
75	debug("%s", cpu->name);
76	}
77
78	return 1;
79	}
80
81
82	/*
83	* i960_cpu_list_available_types():
84	*
85	* Print a list of available I960 CPU types.
86	*/
87	void i960_cpu_list_available_types(void)
88	{
89	debug("i960\n");
90	/* TODO */
91	}
92
93
94	/*
95	* i960_cpu_dumpinfo():
96	*/
97	void i960_cpu_dumpinfo(struct cpu *cpu)
98	{
99	/* TODO */
100	debug("\n");
101	}
102
103
104	/*
105	* i960_cpu_register_dump():
106	*
107	* Dump cpu registers in a relatively readable format.
108	*
109	* gprs: set to non-zero to dump GPRs and some special-purpose registers.
110	* coprocs: set bit 0..3 to dump registers in coproc 0..3.
111	*/
112	void i960_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
113	{
114	char *symbol;
115	uint64_t offset;
116	int x = cpu->cpu_id;
117
118	if (gprs) {
119	/* Special registers (pc, ...) first: */
120	symbol = get_symbol_name(&cpu->machine->symbol_context,
121	cpu->pc, &offset);
122
123	debug("cpu%i: pc = 0x%08"PRIx32, x, (uint32_t)cpu->pc);
124	debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
125	}
126	}
127
128
129	/*
130	* i960_cpu_register_match():
131	*/
132	void i960_cpu_register_match(struct machine m, char name,
133	int writeflag, uint64_t valuep, int match_register)
134	{
135	int cpunr = 0;
136
137	/* CPU number: */
138
139	/* TODO */
140
141	/* Register name: */
142	if (strcasecmp(name, "pc") == 0) {
143	if (writeflag) {
144	m->cpus[cpunr]->pc = *valuep;
145	} else
146	*valuep = m->cpus[cpunr]->pc;
147	*match_register = 1;
148	}
149	}
150
151
152	/*
153	* i960_cpu_tlbdump():
154	*
155	* Called from the debugger to dump the TLB in a readable format.
156	* x is the cpu number to dump, or -1 to dump all CPUs.
157	*
158	* If rawflag is nonzero, then the TLB contents isn't formated nicely,
159	* just dumped.
160	*/
161	void i960_cpu_tlbdump(struct machine *m, int x, int rawflag)
162	{
163	}
164
165
166	/*
167	* i960_cpu_gdb_stub():
168	*
169	* Execute a "remote GDB" command. Returns a newly allocated response string
170	* on success, NULL on failure.
171	*/
172	char i960_cpu_gdb_stub(struct cpu cpu, char *cmd)
173	{
174	fatal("i960_cpu_gdb_stub(): TODO\n");
175	return NULL;
176	}
177
178
179	/*
180	* i960_cpu_interrupt():
181	*/
182	int i960_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
183	{
184	fatal("i960_cpu_interrupt(): TODO\n");
185	return 0;
186	}
187
188
189	/*
190	* i960_cpu_interrupt_ack():
191	*/
192	int i960_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
193	{
194	/* fatal("i960_cpu_interrupt_ack(): TODO\n"); */
195	return 0;
196	}
197
198
199	/* Helper functions: */
200	static void print_four(unsigned char instr, int len)
201	{ debug(" %02x%02x%02x%02x", instr[len], instr[len+1],
202	instr[len+2], instr[len+3]); (*len) += 4; }
203	static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
204	i++) debug(" "); }
205
206
207	/*
208	* i960_cpu_disassemble_instr():
209	*
210	* Convert an instruction word into human readable format, for instruction
211	* tracing.
212	*
213	* If running is 1, cpu->pc should be the address of the instruction.
214	*
215	* If running is 0, things that depend on the runtime environment (eg.
216	* register contents) will not be shown, and addr will be used instead of
217	* cpu->pc for relative addresses.
218	*/
219	int i960_cpu_disassemble_instr(struct cpu cpu, unsigned char ib,
220	int running, uint64_t dumpaddr)
221	{
222	uint64_t offset;
223	int len = 0;
224	char *symbol;
225
226	if (running)
227	dumpaddr = cpu->pc;
228
229	symbol = get_symbol_name(&cpu->machine->symbol_context,
230	dumpaddr, &offset);
231	if (symbol != NULL && offset==0)
232	debug("<%s>\n", symbol);
233
234	if (cpu->machine->ncpus > 1 && running)
235	debug("cpu%i: ", cpu->cpu_id);
236
237	debug("0x%08x: ", (int)dumpaddr);
238
239	print_four(ib, &len);
240
241	/* TODO */
242	print_spaces(len);
243	debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
244
245	return len;
246	}
247
248
249	#include "tmp_i960_tail.c"
250