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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_i960.c,v 1.2 2005/09/07 07:41:30 debug Exp $ |
* $Id: cpu_i960.c,v 1.12 2006/09/19 10:50:08 debug Exp $ |
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* |
* |
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* Intel i960 CPU emulation. |
* Intel i960 CPU emulation. |
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*/ |
*/ |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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#include "settings.h" |
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#include "symbol.h" |
#include "symbol.h" |
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#define DYNTRANS_32 |
#define DYNTRANS_32 |
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if (strcasecmp(cpu_type_name, "i960") != 0) |
if (strcasecmp(cpu_type_name, "i960") != 0) |
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return 0; |
return 0; |
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cpu->run_instr = i960_run_instr; |
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cpu->memory_rw = i960_memory_rw; |
cpu->memory_rw = i960_memory_rw; |
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cpu->update_translation_table = i960_update_translation_table; |
cpu->update_translation_table = i960_update_translation_table; |
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cpu->invalidate_translation_caches_paddr = |
cpu->invalidate_translation_caches = |
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i960_invalidate_translation_caches_paddr; |
i960_invalidate_translation_caches; |
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cpu->invalidate_code_translation = i960_invalidate_code_translation; |
cpu->invalidate_code_translation = i960_invalidate_code_translation; |
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cpu->is_32bit = 1; |
cpu->is_32bit = 1; |
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debug("%s", cpu->name); |
debug("%s", cpu->name); |
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} |
} |
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/* Add all register names to the settings: */ |
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CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
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return 1; |
return 1; |
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} |
} |
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symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
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cpu->pc, &offset); |
cpu->pc, &offset); |
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debug("cpu%i: pc = 0x%08x", x, (int)cpu->pc); |
debug("cpu%i: pc = 0x%08"PRIx32, x, (uint32_t)cpu->pc); |
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debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
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} |
} |
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} |
} |
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/* |
/* |
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* i960_cpu_register_match(): |
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*/ |
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void i960_cpu_register_match(struct machine *m, char *name, |
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int writeflag, uint64_t *valuep, int *match_register) |
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{ |
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int cpunr = 0; |
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/* CPU number: */ |
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/* TODO */ |
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/* Register name: */ |
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if (strcasecmp(name, "pc") == 0) { |
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if (writeflag) { |
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m->cpus[cpunr]->pc = *valuep; |
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} else |
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*valuep = m->cpus[cpunr]->pc; |
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*match_register = 1; |
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} |
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} |
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/* |
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* i960_cpu_show_full_statistics(): |
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* |
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* Show detailed statistics on opcode usage on each cpu. |
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*/ |
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void i960_cpu_show_full_statistics(struct machine *m) |
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{ |
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fatal("i960_cpu_show_full_statistics(): TODO\n"); |
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} |
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/* |
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* i960_cpu_tlbdump(): |
* i960_cpu_tlbdump(): |
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* |
* |
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* Called from the debugger to dump the TLB in a readable format. |
* Called from the debugger to dump the TLB in a readable format. |
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*/ |
*/ |
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void i960_cpu_tlbdump(struct machine *m, int x, int rawflag) |
void i960_cpu_tlbdump(struct machine *m, int x, int rawflag) |
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{ |
{ |
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fatal("i960_cpu_tlbdump(): TODO\n"); |
} |
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/* |
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* i960_cpu_gdb_stub(): |
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* |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
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* on success, NULL on failure. |
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*/ |
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char *i960_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
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{ |
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fatal("i960_cpu_gdb_stub(): TODO\n"); |
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return NULL; |
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} |
} |
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* cpu->pc for relative addresses. |
* cpu->pc for relative addresses. |
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*/ |
*/ |
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int i960_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, |
int i960_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, |
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int running, uint64_t dumpaddr, int bintrans) |
int running, uint64_t dumpaddr) |
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{ |
{ |
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uint64_t offset; |
uint64_t offset; |
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int len = 0; |
int len = 0; |