src/cpus/cpu_i960.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_i960.c,v 1.3 2005/10/22 17:24:20 debug Exp $
 *
 *  Intel i960 CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "symbol.h"

#define DYNTRANS_32
#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
#include "tmp_i960_head.c"


/*
 *  i960_cpu_new():
 *
 *  Create a new I960 cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching I960 processor with
 *  this cpu_type_name.
 */
int i960_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
        int cpu_id, char *cpu_type_name)
{
        if (strcasecmp(cpu_type_name, "i960") != 0)
                return 0;

        cpu->memory_rw = i960_memory_rw;
        cpu->update_translation_table = i960_update_translation_table;
        cpu->invalidate_translation_caches =
            i960_invalidate_translation_caches;
        cpu->invalidate_code_translation = i960_invalidate_code_translation;
        cpu->is_32bit = 1;

        cpu->byte_order = EMUL_BIG_ENDIAN;

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        return 1;
}


/*
 *  i960_cpu_list_available_types():
 *
 *  Print a list of available I960 CPU types.
 */
void i960_cpu_list_available_types(void)
{
        debug("i960\n");
        /*  TODO  */
}


/*
 *  i960_cpu_dumpinfo():
 */
void i960_cpu_dumpinfo(struct cpu *cpu)
{
        /*  TODO  */
        debug("\n");
}


/*
 *  i960_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void i960_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset;
        int x = cpu->cpu_id;

        if (gprs) {
                /*  Special registers (pc, ...) first:  */
                symbol = get_symbol_name(&cpu->machine->symbol_context,
                    cpu->pc, &offset);

                debug("cpu%i: pc  = 0x%08x", x, (int)cpu->pc);
                debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");
        }
}


/*
 *  i960_cpu_register_match():
 */
void i960_cpu_register_match(struct machine *m, char *name,
        int writeflag, uint64_t *valuep, int *match_register)
{
        int cpunr = 0;

        /*  CPU number:  */

        /*  TODO  */

        /*  Register name:  */
        if (strcasecmp(name, "pc") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->pc = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->pc;
                *match_register = 1;
        }
}


/*
 *  i960_cpu_show_full_statistics():
 *
 *  Show detailed statistics on opcode usage on each cpu.
 */
void i960_cpu_show_full_statistics(struct machine *m)
{
        fatal("i960_cpu_show_full_statistics(): TODO\n");
}


/*
 *  i960_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void i960_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
        fatal("i960_cpu_tlbdump(): TODO\n");
}


/*
 *  i960_cpu_interrupt():
 */
int i960_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
{
        fatal("i960_cpu_interrupt(): TODO\n");
        return 0;
}


/*
 *  i960_cpu_interrupt_ack():
 */
int i960_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
{
        /*  fatal("i960_cpu_interrupt_ack(): TODO\n");  */
        return 0;
}


/*  Helper functions:  */
static void print_four(unsigned char *instr, int *len)
{ debug(" %02x%02x%02x%02x", instr[*len], instr[*len+1],
        instr[*len+2], instr[*len+3]); (*len) += 4; }
static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
    i++) debug(" "); }


/*
 *  i960_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int i960_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
        int running, uint64_t dumpaddr, int bintrans)
{
        uint64_t offset;
        int len = 0;
        char *symbol;

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

        debug("0x%08x: ", (int)dumpaddr);

        print_four(ib, &len);

        /*  TODO  */
        print_spaces(len);
        debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);

        return len;
}


#include "tmp_i960_tail.c"

1	dpavlin	14	/*
2			* Copyright (C) 2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	18	* $Id: cpu_i960.c,v 1.3 2005/10/22 17:24:20 debug Exp $
29	dpavlin	14	*
30			* Intel i960 CPU emulation.
31			*/
32
33			#include <stdio.h>
34			#include <stdlib.h>
35			#include <string.h>
36			#include <ctype.h>
37
38			#include "cpu.h"
39			#include "machine.h"
40			#include "memory.h"
41			#include "misc.h"
42			#include "symbol.h"
43
44			#define DYNTRANS_32
45			#define DYNTRANS_VARIABLE_INSTRUCTION_LENGTH
46			#include "tmp_i960_head.c"
47
48
49			/*
50			* i960_cpu_new():
51			*
52			* Create a new I960 cpu object.
53			*
54			* Returns 1 on success, 0 if there was no matching I960 processor with
55			* this cpu_type_name.
56			*/
57			int i960_cpu_new(struct cpu cpu, struct memory mem, struct machine *machine,
58			int cpu_id, char *cpu_type_name)
59			{
60			if (strcasecmp(cpu_type_name, "i960") != 0)
61			return 0;
62
63			cpu->memory_rw = i960_memory_rw;
64			cpu->update_translation_table = i960_update_translation_table;
65	dpavlin	18	cpu->invalidate_translation_caches =
66			i960_invalidate_translation_caches;
67	dpavlin	14	cpu->invalidate_code_translation = i960_invalidate_code_translation;
68			cpu->is_32bit = 1;
69
70			cpu->byte_order = EMUL_BIG_ENDIAN;
71
72			/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
73			if (cpu_id == 0) {
74			debug("%s", cpu->name);
75			}
76
77			return 1;
78			}
79
80
81			/*
82			* i960_cpu_list_available_types():
83			*
84			* Print a list of available I960 CPU types.
85			*/
86			void i960_cpu_list_available_types(void)
87			{
88			debug("i960\n");
89			/* TODO */
90			}
91
92
93			/*
94			* i960_cpu_dumpinfo():
95			*/
96			void i960_cpu_dumpinfo(struct cpu *cpu)
97			{
98			/* TODO */
99			debug("\n");
100			}
101
102
103			/*
104			* i960_cpu_register_dump():
105			*
106			* Dump cpu registers in a relatively readable format.
107			*
108			* gprs: set to non-zero to dump GPRs and some special-purpose registers.
109			* coprocs: set bit 0..3 to dump registers in coproc 0..3.
110			*/
111			void i960_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
112			{
113			char *symbol;
114			uint64_t offset;
115			int x = cpu->cpu_id;
116
117			if (gprs) {
118			/* Special registers (pc, ...) first: */
119			symbol = get_symbol_name(&cpu->machine->symbol_context,
120			cpu->pc, &offset);
121
122			debug("cpu%i: pc = 0x%08x", x, (int)cpu->pc);
123			debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
124			}
125			}
126
127
128			/*
129			* i960_cpu_register_match():
130			*/
131			void i960_cpu_register_match(struct machine m, char name,
132			int writeflag, uint64_t valuep, int match_register)
133			{
134			int cpunr = 0;
135
136			/* CPU number: */
137
138			/* TODO */
139
140			/* Register name: */
141			if (strcasecmp(name, "pc") == 0) {
142			if (writeflag) {
143			m->cpus[cpunr]->pc = *valuep;
144			} else
145			*valuep = m->cpus[cpunr]->pc;
146			*match_register = 1;
147			}
148			}
149
150
151			/*
152			* i960_cpu_show_full_statistics():
153			*
154			* Show detailed statistics on opcode usage on each cpu.
155			*/
156			void i960_cpu_show_full_statistics(struct machine *m)
157			{
158			fatal("i960_cpu_show_full_statistics(): TODO\n");
159			}
160
161
162			/*
163			* i960_cpu_tlbdump():
164			*
165			* Called from the debugger to dump the TLB in a readable format.
166			* x is the cpu number to dump, or -1 to dump all CPUs.
167			*
168			* If rawflag is nonzero, then the TLB contents isn't formated nicely,
169			* just dumped.
170			*/
171			void i960_cpu_tlbdump(struct machine *m, int x, int rawflag)
172			{
173			fatal("i960_cpu_tlbdump(): TODO\n");
174			}
175
176
177			/*
178			* i960_cpu_interrupt():
179			*/
180			int i960_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
181			{
182			fatal("i960_cpu_interrupt(): TODO\n");
183			return 0;
184			}
185
186
187			/*
188			* i960_cpu_interrupt_ack():
189			*/
190			int i960_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
191			{
192			/* fatal("i960_cpu_interrupt_ack(): TODO\n"); */
193			return 0;
194			}
195
196
197			/* Helper functions: */
198			static void print_four(unsigned char instr, int len)
199			{ debug(" %02x%02x%02x%02x", instr[len], instr[len+1],
200			instr[len+2], instr[len+3]); (*len) += 4; }
201			static void print_spaces(int len) { int i; debug(" "); for (i=0; i<16-len/2*5;
202			i++) debug(" "); }
203
204
205			/*
206			* i960_cpu_disassemble_instr():
207			*
208			* Convert an instruction word into human readable format, for instruction
209			* tracing.
210			*
211			* If running is 1, cpu->pc should be the address of the instruction.
212			*
213			* If running is 0, things that depend on the runtime environment (eg.
214			* register contents) will not be shown, and addr will be used instead of
215			* cpu->pc for relative addresses.
216			*/
217			int i960_cpu_disassemble_instr(struct cpu cpu, unsigned char ib,
218			int running, uint64_t dumpaddr, int bintrans)
219			{
220			uint64_t offset;
221			int len = 0;
222			char *symbol;
223
224			if (running)
225			dumpaddr = cpu->pc;
226
227			symbol = get_symbol_name(&cpu->machine->symbol_context,
228			dumpaddr, &offset);
229			if (symbol != NULL && offset==0)
230			debug("<%s>\n", symbol);
231
232			if (cpu->machine->ncpus > 1 && running)
233			debug("cpu%i: ", cpu->cpu_id);
234
235			debug("0x%08x: ", (int)dumpaddr);
236
237			print_four(ib, &len);
238
239			/* TODO */
240			print_spaces(len);
241			debug("UNIMPLEMENTED 0x%02x%02x\n", ib[0], ib[1]);
242
243			return len;
244			}
245
246
247			#include "tmp_i960_tail.c"
248