--- trunk/src/cpus/cpu_hppa.c 2007/10/08 16:19:11 18 +++ trunk/src/cpus/cpu_hppa.c 2007/10/08 16:20:58 32 @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005 Anders Gavare. All rights reserved. + * Copyright (C) 2005-2006 Anders Gavare. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -15,7 +15,7 @@ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT HPPAALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_hppa.c,v 1.2 2005/10/22 17:24:20 debug Exp $ + * $Id: cpu_hppa.c,v 1.16 2006/09/19 10:50:08 debug Exp $ * * HP PA-RISC CPU emulation. * @@ -41,6 +41,7 @@ #include "machine.h" #include "memory.h" #include "misc.h" +#include "settings.h" #include "symbol.h" @@ -70,12 +71,14 @@ cpu->cd.hppa.bits = 32; if (cpu->is_32bit) { + cpu->run_instr = hppa32_run_instr; cpu->update_translation_table = hppa32_update_translation_table; cpu->invalidate_translation_caches = hppa32_invalidate_translation_caches; cpu->invalidate_code_translation = hppa32_invalidate_code_translation; } else { + cpu->run_instr = hppa_run_instr; cpu->update_translation_table = hppa_update_translation_table; cpu->invalidate_translation_caches = hppa_invalidate_translation_caches; @@ -83,11 +86,14 @@ hppa_invalidate_code_translation; } - /* Only hppaow name and caches etc for CPU nr 0 (in SMP machines): */ + /* Only show name and caches etc for CPU nr 0 (in SMP machines): */ if (cpu_id == 0) { debug("%s", cpu->name); } + /* Add all register names to the settings: */ + CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); + return 1; } @@ -125,7 +131,7 @@ void hppa_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs) { char *symbol; - uint64_t offset, tmp; + uint64_t offset; int i, x = cpu->cpu_id, nregs = 32; int bits32 = cpu->cd.hppa.bits == 32; @@ -136,9 +142,9 @@ debug("cpu%i: pc = 0x", x); if (bits32) - debug("%08x", (int)cpu->pc); + debug("%08"PRIx32, (uint32_t) cpu->pc); else - debug("%016llx", (long long)cpu->pc); + debug("%016"PRIx64, (uint64_t) cpu->pc); debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); if (bits32) { @@ -146,8 +152,8 @@ for (i=0; icd.hppa.r[i]); + debug(" r%02i = 0x%08"PRIx32" ", i, + (uint32_t)cpu->cd.hppa.r[i]); if ((i % 4) == 3) debug("\n"); } @@ -157,8 +163,8 @@ int r = (i >> 1) + ((i & 1) << 4); if ((i % 2) == 0) debug("cpu%i:", x); - debug(" r%02i = 0x%016llx ", r, - (long long)cpu->cd.hppa.r[r]); + debug(" r%02i = 0x%016"PRIx64" ", r, + (uint64_t) cpu->cd.hppa.r[r]); if ((i % 2) == 1) debug("\n"); } @@ -168,40 +174,6 @@ /* - * hppa_cpu_register_match(): - */ -void hppa_cpu_register_match(struct machine *m, char *name, - int writeflag, uint64_t *valuep, int *match_register) -{ - int cpunr = 0; - - /* CPU number: */ - - /* TODO */ - - /* Register name: */ - if (strcasecmp(name, "pc") == 0) { - if (writeflag) { - m->cpus[cpunr]->pc = *valuep; - } else - *valuep = m->cpus[cpunr]->pc; - *match_register = 1; - } -} - - -/* - * hppa_cpu_show_full_statistics(): - * - * Show detailed statistics on opcode usage on each cpu. - */ -void hppa_cpu_show_full_statistics(struct machine *m) -{ - fatal("hppa_cpu_show_full_statistics(): TODO\n"); -} - - -/* * hppa_cpu_tlbdump(): * * Called from the debugger to dump the TLB in a readable format. @@ -212,7 +184,19 @@ */ void hppa_cpu_tlbdump(struct machine *m, int x, int rawflag) { - fatal("hppa_cpu_tlbdump(): TODO\n"); +} + + +/* + * hppa_cpu_gdb_stub(): + * + * Execute a "remote GDB" command. Returns a newly allocated response string + * on success, NULL on failure. + */ +char *hppa_cpu_gdb_stub(struct cpu *cpu, char *cmd) +{ + fatal("hppa_cpu_gdb_stub(): TODO\n"); + return NULL; } @@ -242,19 +226,18 @@ * Convert an instruction word into human readable format, for instruction * tracing. * - * If running is 1, cpu->pc hppaould be the address of the instruction. + * If running is 1, cpu->pc should be the address of the instruction. * * If running is 0, things that depend on the runtime environment (eg. - * register contents) will not be hppaown, and addr will be used instead of + * register contents) will not be shown, and addr will be used instead of * cpu->pc for relative addresses. */ int hppa_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr, - int running, uint64_t dumpaddr, int bintrans) + int running, uint64_t dumpaddr) { - uint64_t offset, addr; + uint64_t offset; uint32_t iword; - int hi6; - char *symbol, *mnem = "ERROR"; + char *symbol; if (running) dumpaddr = cpu->pc; @@ -268,9 +251,9 @@ debug("cpu%i: ", cpu->cpu_id); if (cpu->cd.hppa.bits == 32) - debug("%08x", (int)dumpaddr); + debug("%08"PRIx32, (uint32_t) dumpaddr); else - debug("%016llx", (long long)dumpaddr); + debug("%016"PRIx64, (uint64_t) dumpaddr); if (cpu->byte_order == EMUL_BIG_ENDIAN) iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8) @@ -279,7 +262,7 @@ iword = (instr[3] << 24) + (instr[2] << 16) + (instr[1] << 8) + instr[0]; - debug(": %08x\t", iword); + debug(": %08"PRIx32"\t", (uint32_t) iword); /* * Decode the instruction: