/[gxemul]/trunk/src/cpus/cpu_hppa.c
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Annotation of /trunk/src/cpus/cpu_hppa.c

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Revision 18 - (hide annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 7113 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 dpavlin 14 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT HPPAALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 18 * $Id: cpu_hppa.c,v 1.2 2005/10/22 17:24:20 debug Exp $
29 dpavlin 14 *
30     * HP PA-RISC CPU emulation.
31     *
32     * TODO
33     */
34    
35     #include <stdio.h>
36     #include <stdlib.h>
37     #include <string.h>
38     #include <ctype.h>
39    
40     #include "cpu.h"
41     #include "machine.h"
42     #include "memory.h"
43     #include "misc.h"
44     #include "symbol.h"
45    
46    
47     #define DYNTRANS_DUALMODE_32
48     #include "tmp_hppa_head.c"
49    
50    
51     /*
52     * hppa_cpu_new():
53     *
54     * Create a new HPPA cpu object.
55     *
56     * Returns 1 on success, 0 if there was no matching HPPA processor with
57     * this cpu_type_name.
58     */
59     int hppa_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
60     int cpu_id, char *cpu_type_name)
61     {
62     if (strcasecmp(cpu_type_name, "HPPA") != 0)
63     return 0;
64    
65     cpu->memory_rw = hppa_memory_rw;
66    
67     /* TODO: per CPU type? */
68     cpu->byte_order = EMUL_LITTLE_ENDIAN;
69     cpu->is_32bit = 1;
70     cpu->cd.hppa.bits = 32;
71    
72     if (cpu->is_32bit) {
73     cpu->update_translation_table = hppa32_update_translation_table;
74 dpavlin 18 cpu->invalidate_translation_caches =
75     hppa32_invalidate_translation_caches;
76 dpavlin 14 cpu->invalidate_code_translation =
77     hppa32_invalidate_code_translation;
78     } else {
79     cpu->update_translation_table = hppa_update_translation_table;
80 dpavlin 18 cpu->invalidate_translation_caches =
81     hppa_invalidate_translation_caches;
82 dpavlin 14 cpu->invalidate_code_translation =
83     hppa_invalidate_code_translation;
84     }
85    
86     /* Only hppaow name and caches etc for CPU nr 0 (in SMP machines): */
87     if (cpu_id == 0) {
88     debug("%s", cpu->name);
89     }
90    
91     return 1;
92     }
93    
94    
95     /*
96     * hppa_cpu_list_available_types():
97     *
98     * Print a list of available HPPA CPU types.
99     */
100     void hppa_cpu_list_available_types(void)
101     {
102     debug("HPPA\n");
103     /* TODO */
104     }
105    
106    
107     /*
108     * hppa_cpu_dumpinfo():
109     */
110     void hppa_cpu_dumpinfo(struct cpu *cpu)
111     {
112     debug("\n");
113     /* TODO */
114     }
115    
116    
117     /*
118     * hppa_cpu_register_dump():
119     *
120     * Dump cpu registers in a relatively readable format.
121     *
122     * gprs: set to non-zero to dump GPRs and some special-purpose registers.
123     * coprocs: set bit 0..3 to dump registers in coproc 0..3.
124     */
125     void hppa_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
126     {
127     char *symbol;
128     uint64_t offset, tmp;
129     int i, x = cpu->cpu_id, nregs = 32;
130     int bits32 = cpu->cd.hppa.bits == 32;
131    
132     if (gprs) {
133     /* Special registers (pc, ...) first: */
134     symbol = get_symbol_name(&cpu->machine->symbol_context,
135     cpu->pc, &offset);
136    
137     debug("cpu%i: pc = 0x", x);
138     if (bits32)
139     debug("%08x", (int)cpu->pc);
140     else
141     debug("%016llx", (long long)cpu->pc);
142     debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
143    
144     if (bits32) {
145     /* 32-bit: */
146     for (i=0; i<nregs; i++) {
147     if ((i % 4) == 0)
148     debug("cpu%i:", x);
149     debug(" r%02i = 0x%08x ", i,
150     (int)cpu->cd.hppa.r[i]);
151     if ((i % 4) == 3)
152     debug("\n");
153     }
154     } else {
155     /* 64-bit: */
156     for (i=0; i<nregs; i++) {
157     int r = (i >> 1) + ((i & 1) << 4);
158     if ((i % 2) == 0)
159     debug("cpu%i:", x);
160     debug(" r%02i = 0x%016llx ", r,
161     (long long)cpu->cd.hppa.r[r]);
162     if ((i % 2) == 1)
163     debug("\n");
164     }
165     }
166     }
167     }
168    
169    
170     /*
171     * hppa_cpu_register_match():
172     */
173     void hppa_cpu_register_match(struct machine *m, char *name,
174     int writeflag, uint64_t *valuep, int *match_register)
175     {
176     int cpunr = 0;
177    
178     /* CPU number: */
179    
180     /* TODO */
181    
182     /* Register name: */
183     if (strcasecmp(name, "pc") == 0) {
184     if (writeflag) {
185     m->cpus[cpunr]->pc = *valuep;
186     } else
187     *valuep = m->cpus[cpunr]->pc;
188     *match_register = 1;
189     }
190     }
191    
192    
193     /*
194     * hppa_cpu_show_full_statistics():
195     *
196     * Show detailed statistics on opcode usage on each cpu.
197     */
198     void hppa_cpu_show_full_statistics(struct machine *m)
199     {
200     fatal("hppa_cpu_show_full_statistics(): TODO\n");
201     }
202    
203    
204     /*
205     * hppa_cpu_tlbdump():
206     *
207     * Called from the debugger to dump the TLB in a readable format.
208     * x is the cpu number to dump, or -1 to dump all CPUs.
209     *
210     * If rawflag is nonzero, then the TLB contents isn't formated nicely,
211     * just dumped.
212     */
213     void hppa_cpu_tlbdump(struct machine *m, int x, int rawflag)
214     {
215     fatal("hppa_cpu_tlbdump(): TODO\n");
216     }
217    
218    
219     /*
220     * hppa_cpu_interrupt():
221     */
222     int hppa_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
223     {
224     fatal("hppa_cpu_interrupt(): TODO\n");
225     return 0;
226     }
227    
228    
229     /*
230     * hppa_cpu_interrupt_ack():
231     */
232     int hppa_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
233     {
234     /* fatal("hppa_cpu_interrupt_ack(): TODO\n"); */
235     return 0;
236     }
237    
238    
239     /*
240     * hppa_cpu_disassemble_instr():
241     *
242     * Convert an instruction word into human readable format, for instruction
243     * tracing.
244     *
245     * If running is 1, cpu->pc hppaould be the address of the instruction.
246     *
247     * If running is 0, things that depend on the runtime environment (eg.
248     * register contents) will not be hppaown, and addr will be used instead of
249     * cpu->pc for relative addresses.
250     */
251     int hppa_cpu_disassemble_instr(struct cpu *cpu, unsigned char *instr,
252     int running, uint64_t dumpaddr, int bintrans)
253     {
254     uint64_t offset, addr;
255     uint32_t iword;
256     int hi6;
257     char *symbol, *mnem = "ERROR";
258    
259     if (running)
260     dumpaddr = cpu->pc;
261    
262     symbol = get_symbol_name(&cpu->machine->symbol_context,
263     dumpaddr, &offset);
264     if (symbol != NULL && offset==0)
265     debug("<%s>\n", symbol);
266    
267     if (cpu->machine->ncpus > 1 && running)
268     debug("cpu%i: ", cpu->cpu_id);
269    
270     if (cpu->cd.hppa.bits == 32)
271     debug("%08x", (int)dumpaddr);
272     else
273     debug("%016llx", (long long)dumpaddr);
274    
275     if (cpu->byte_order == EMUL_BIG_ENDIAN)
276     iword = (instr[0] << 24) + (instr[1] << 16) + (instr[2] << 8)
277     + instr[3];
278     else
279     iword = (instr[3] << 24) + (instr[2] << 16) + (instr[1] << 8)
280     + instr[0];
281    
282     debug(": %08x\t", iword);
283    
284     /*
285     * Decode the instruction:
286     */
287    
288     debug("TODO\n");
289    
290     return sizeof(iword);
291     }
292    
293    
294     #include "tmp_hppa_tail.c"
295    

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