/[gxemul]/trunk/src/cpus/cpu_avr.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/cpus/cpu_avr.c

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Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 9728 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 /*
2 * Copyright (C) 2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: cpu_avr.c,v 1.5 2005/10/22 17:24:20 debug Exp $
29 *
30 * Atmel AVR (8-bit) CPU emulation.
31 */
32
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 #include <ctype.h>
37
38 #include "cpu.h"
39 #include "machine.h"
40 #include "memory.h"
41 #include "misc.h"
42 #include "symbol.h"
43
44
45 #define DYNTRANS_32
46 #include "tmp_avr_head.c"
47
48
49 /*
50 * avr_cpu_new():
51 *
52 * Create a new AVR cpu object.
53 *
54 * Returns 1 on success, 0 if there was no matching AVR processor with
55 * this cpu_type_name.
56 */
57 int avr_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
58 int cpu_id, char *cpu_type_name)
59 {
60 if (strcasecmp(cpu_type_name, "AVR") != 0)
61 return 0;
62
63 cpu->memory_rw = avr_memory_rw;
64 cpu->update_translation_table = avr_update_translation_table;
65 cpu->invalidate_translation_caches =
66 avr_invalidate_translation_caches;
67 cpu->invalidate_code_translation = avr_invalidate_code_translation;
68 cpu->is_32bit = 1;
69
70 cpu->byte_order = EMUL_LITTLE_ENDIAN;
71
72 cpu->cd.avr.pc_mask = 0xffff;
73
74 /* Only show name and caches etc for CPU nr 0 (in SMP machines): */
75 if (cpu_id == 0) {
76 debug("%s", cpu->name);
77 }
78
79 return 1;
80 }
81
82
83 /*
84 * avr_cpu_list_available_types():
85 *
86 * Print a list of available AVR CPU types.
87 */
88 void avr_cpu_list_available_types(void)
89 {
90 debug("AVR\n");
91 /* TODO */
92 }
93
94
95 /*
96 * avr_cpu_dumpinfo():
97 */
98 void avr_cpu_dumpinfo(struct cpu *cpu)
99 {
100 /* TODO */
101 debug("\n");
102 }
103
104
105 /*
106 * avr_cpu_register_dump():
107 *
108 * Dump cpu registers in a relatively readable format.
109 *
110 * gprs: set to non-zero to dump GPRs and some special-purpose registers.
111 * coprocs: set bit 0..3 to dump registers in coproc 0..3.
112 */
113 void avr_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
114 {
115 char *symbol;
116 uint64_t offset;
117 int i, x = cpu->cpu_id;
118
119 if (gprs) {
120 /* Special registers (pc, ...) first: */
121 symbol = get_symbol_name(&cpu->machine->symbol_context,
122 cpu->pc, &offset);
123
124 debug("cpu%i: sreg = ", x);
125 debug("%c", cpu->cd.avr.sreg & AVR_SREG_I? 'I' : 'i');
126 debug("%c", cpu->cd.avr.sreg & AVR_SREG_T? 'T' : 't');
127 debug("%c", cpu->cd.avr.sreg & AVR_SREG_H? 'H' : 'h');
128 debug("%c", cpu->cd.avr.sreg & AVR_SREG_S? 'S' : 's');
129 debug("%c", cpu->cd.avr.sreg & AVR_SREG_V? 'V' : 'v');
130 debug("%c", cpu->cd.avr.sreg & AVR_SREG_N? 'N' : 'n');
131 debug("%c", cpu->cd.avr.sreg & AVR_SREG_Z? 'Z' : 'z');
132 debug("%c", cpu->cd.avr.sreg & AVR_SREG_C? 'C' : 'c');
133 debug(" pc = 0x%04x", x, (int)cpu->pc);
134 debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
135
136 for (i=0; i<N_AVR_REGS; i++) {
137 if ((i % 4) == 0)
138 debug("cpu%i:\t", x);
139 debug("r%02i = 0x%02x", i, cpu->cd.avr.r[i]);
140 debug((i % 4) == 3? "\n" : " ");
141 }
142 }
143
144 debug("cpu%i: nr of instructions: %lli\n", x,
145 (long long)cpu->machine->ncycles);
146 debug("cpu%i: nr of cycles: %lli\n", x,
147 (long long)(cpu->machine->ncycles + cpu->cd.avr.extra_cycles));
148 }
149
150
151 /*
152 * avr_cpu_register_match():
153 */
154 void avr_cpu_register_match(struct machine *m, char *name,
155 int writeflag, uint64_t *valuep, int *match_register)
156 {
157 int cpunr = 0;
158
159 /* CPU number: */
160 /* TODO */
161
162 if (strcasecmp(name, "pc") == 0) {
163 if (writeflag) {
164 m->cpus[cpunr]->pc = *valuep;
165 } else
166 *valuep = m->cpus[cpunr]->pc;
167 *match_register = 1;
168 } else if (name[0] == 'r' && isdigit((int)name[1])) {
169 int nr = atoi(name + 1);
170 if (nr >= 0 && nr < N_AVR_REGS) {
171 if (writeflag)
172 m->cpus[cpunr]->cd.avr.r[nr] = *valuep;
173 else
174 *valuep = m->cpus[cpunr]->cd.avr.r[nr];
175 *match_register = 1;
176 }
177 }
178 }
179
180
181 /*
182 * avr_cpu_show_full_statistics():
183 *
184 * Show detailed statistics on opcode usage on each cpu.
185 */
186 void avr_cpu_show_full_statistics(struct machine *m)
187 {
188 fatal("avr_cpu_show_full_statistics(): TODO\n");
189 }
190
191
192 /*
193 * avr_cpu_tlbdump():
194 *
195 * Called from the debugger to dump the TLB in a readable format.
196 * x is the cpu number to dump, or -1 to dump all CPUs.
197 *
198 * If rawflag is nonzero, then the TLB contents isn't formated nicely,
199 * just dumped.
200 */
201 void avr_cpu_tlbdump(struct machine *m, int x, int rawflag)
202 {
203 fatal("avr_cpu_tlbdump(): TODO\n");
204 }
205
206
207 /*
208 * avr_cpu_interrupt():
209 */
210 int avr_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
211 {
212 fatal("avr_cpu_interrupt(): TODO\n");
213 return 0;
214 }
215
216
217 /*
218 * avr_cpu_interrupt_ack():
219 */
220 int avr_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
221 {
222 /* fatal("avr_cpu_interrupt_ack(): TODO\n"); */
223 return 0;
224 }
225
226
227 /* Helper functions: */
228 static void print_two(unsigned char *instr, int *len)
229 { debug(" %02x %02x", instr[*len], instr[*len+1]); (*len) += 2; }
230 static void print_spaces(int len) { int i; debug(" "); for (i=0; i<15-len/2*6;
231 i++) debug(" "); }
232
233
234 /*
235 * avr_cpu_disassemble_instr():
236 *
237 * Convert an instruction word into human readable format, for instruction
238 * tracing and disassembly.
239 *
240 * If running is 1, cpu->pc should be the address of the instruction.
241 *
242 * If running is 0, things that depend on the runtime environment (eg.
243 * register contents) will not be shown, and addr will be used instead of
244 * cpu->pc for relative addresses.
245 */
246 int avr_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
247 int running, uint64_t dumpaddr, int bintrans)
248 {
249 uint64_t offset;
250 int len = 0, addr, iw, rd, rr, imm;
251 char *symbol;
252 char *sreg_names = SREG_NAMES;
253
254 if (running)
255 dumpaddr = cpu->pc;
256
257 symbol = get_symbol_name(&cpu->machine->symbol_context,
258 dumpaddr, &offset);
259 if (symbol != NULL && offset==0)
260 debug("<%s>\n", symbol);
261
262 if (cpu->machine->ncpus > 1 && running)
263 debug("cpu%i: ", cpu->cpu_id);
264
265 /* TODO: 22-bit PC */
266 debug("0x%04x: ", (int)dumpaddr);
267
268 print_two(ib, &len);
269 iw = (ib[1] << 8) + ib[0];
270
271 if ((iw & 0xffff) == 0x0000) {
272 print_spaces(len);
273 debug("nop\n");
274 } else if ((iw & 0xfc00) == 0x0c00) {
275 print_spaces(len);
276 rd = (iw & 0x1f0) >> 4;
277 rr = ((iw & 0x200) >> 5) | (iw & 0xf);
278 debug("add\tr%i,r%i\n", rd, rr);
279 } else if ((iw & 0xfc00) == 0x1c00) {
280 print_spaces(len);
281 rd = (iw & 0x1f0) >> 4;
282 rr = ((iw & 0x200) >> 5) | (iw & 0xf);
283 debug("adc\tr%i,r%i\n", rd, rr);
284 } else if ((iw & 0xfc00) == 0x2000) {
285 print_spaces(len);
286 rd = (iw & 0x1f0) >> 4;
287 rr = ((iw & 0x200) >> 5) | (iw & 0xf);
288 debug("and\tr%i,r%i\n", rd, rr);
289 } else if ((iw & 0xfc00) == 0x2c00) {
290 print_spaces(len);
291 rd = (iw & 0x1f0) >> 4;
292 rr = ((iw & 0x200) >> 5) | (iw & 0xf);
293 debug("mov\tr%i,r%i\n", rd, rr);
294 } else if ((iw & 0xfe0f) == 0x8000) {
295 print_spaces(len);
296 rd = (iw >> 4) & 31;
297 debug("ld\tr%i,Z\n", rd);
298 } else if ((iw & 0xfe0f) == 0x8008) {
299 print_spaces(len);
300 rd = (iw >> 4) & 31;
301 debug("ld\tr%i,Y\n", rd);
302 } else if ((iw & 0xfe0f) == 0x900c) {
303 print_spaces(len);
304 rd = (iw >> 4) & 31;
305 debug("ld\tr%i,X\n", rd);
306 } else if ((iw & 0xfc0f) == 0x900f) {
307 print_spaces(len);
308 rd = (iw >> 4) & 31;
309 debug("%s\tr%i\n", iw & 0x200? "push" : "pop", rd);
310 } else if ((iw & 0xfe0f) == 0x9200) {
311 print_two(ib, &len);
312 addr = (ib[3] << 8) + ib[2];
313 print_spaces(len);
314 debug("sts\t0x%x,r%i\n", addr, (iw & 0x1f0) >> 4);
315 } else if ((iw & 0xfe0f) == 0x9402) {
316 print_spaces(len);
317 rd = (iw >> 4) & 31;
318 debug("swap\tr%i\n", rd);
319 } else if ((iw & 0xff0f) == 0x9408) {
320 print_spaces(len);
321 rd = (iw >> 4) & 7;
322 debug("%s%c\n", iw & 0x80? "cl" : "se", sreg_names[rd]);
323 } else if ((iw & 0xffef) == 0x9508) {
324 /* ret and reti */
325 print_spaces(len);
326 debug("ret%s\n", (iw & 0x10)? "i" : "");
327 } else if ((iw & 0xffff) == 0x9588) {
328 print_spaces(len);
329 debug("sleep\n");
330 } else if ((iw & 0xffff) == 0x95a8) {
331 print_spaces(len);
332 debug("wdr\n");
333 } else if ((iw & 0xff00) == 0x9600) {
334 print_spaces(len);
335 imm = ((iw & 0xc0) >> 2) | (iw & 0xf);
336 rd = ((iw >> 4) & 3) * 2 + 24;
337 debug("adiw\tr%i:r%i,0x%x\n", rd, rd+1, imm);
338 } else if ((iw & 0xe000) == 0xc000) {
339 print_spaces(len);
340 addr = (int16_t)((iw & 0xfff) << 4);
341 addr = (addr >> 3) + dumpaddr + 2;
342 debug("%s\t0x%x\n", iw & 0x1000? "rcall" : "rjmp", addr);
343 } else if ((iw & 0xf000) == 0xe000) {
344 print_spaces(len);
345 rd = ((iw >> 4) & 0xf) + 16;
346 imm = ((iw >> 4) & 0xf0) | (iw & 0xf);
347 debug("ldi\tr%i,0x%x\n", rd, imm);
348 } else {
349 print_spaces(len);
350 debug("UNIMPLEMENTED 0x%04x\n", iw);
351 }
352
353 return len;
354 }
355
356
357 #include "tmp_avr_tail.c"
358

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