src/cpus/cpu_avr.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *
 *
 *  $Id: cpu_avr.c,v 1.5 2005/10/22 17:24:20 debug Exp $
 *
 *  Atmel AVR (8-bit) CPU emulation.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <ctype.h>

#include "cpu.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"
#include "symbol.h"


#define DYNTRANS_32
#include "tmp_avr_head.c"


/*
 *  avr_cpu_new():
 *
 *  Create a new AVR cpu object.
 *
 *  Returns 1 on success, 0 if there was no matching AVR processor with
 *  this cpu_type_name.
 */
int avr_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine,
        int cpu_id, char *cpu_type_name)
{
        if (strcasecmp(cpu_type_name, "AVR") != 0)
                return 0;

        cpu->memory_rw = avr_memory_rw;
        cpu->update_translation_table = avr_update_translation_table;
        cpu->invalidate_translation_caches =
            avr_invalidate_translation_caches;
        cpu->invalidate_code_translation = avr_invalidate_code_translation;
        cpu->is_32bit = 1;

        cpu->byte_order = EMUL_LITTLE_ENDIAN;

        cpu->cd.avr.pc_mask = 0xffff;

        /*  Only show name and caches etc for CPU nr 0 (in SMP machines):  */
        if (cpu_id == 0) {
                debug("%s", cpu->name);
        }

        return 1;
}


/*
 *  avr_cpu_list_available_types():
 *
 *  Print a list of available AVR CPU types.
 */
void avr_cpu_list_available_types(void)
{
        debug("AVR\n");
        /*  TODO  */
}


/*
 *  avr_cpu_dumpinfo():
 */
void avr_cpu_dumpinfo(struct cpu *cpu)
{
        /*  TODO  */
        debug("\n");
}


/*
 *  avr_cpu_register_dump():
 *
 *  Dump cpu registers in a relatively readable format.
 *
 *  gprs: set to non-zero to dump GPRs and some special-purpose registers.
 *  coprocs: set bit 0..3 to dump registers in coproc 0..3.
 */
void avr_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
{
        char *symbol;
        uint64_t offset;
        int i, x = cpu->cpu_id;

        if (gprs) {
                /*  Special registers (pc, ...) first:  */
                symbol = get_symbol_name(&cpu->machine->symbol_context,
                    cpu->pc, &offset);

                debug("cpu%i: sreg = ", x);
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_I? 'I' : 'i');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_T? 'T' : 't');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_H? 'H' : 'h');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_S? 'S' : 's');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_V? 'V' : 'v');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_N? 'N' : 'n');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_Z? 'Z' : 'z');
                debug("%c", cpu->cd.avr.sreg & AVR_SREG_C? 'C' : 'c');
                debug("  pc = 0x%04x", x, (int)cpu->pc);
                debug("  <%s>\n", symbol != NULL? symbol : " no symbol ");

                for (i=0; i<N_AVR_REGS; i++) {
                        if ((i % 4) == 0)
                                debug("cpu%i:\t", x);
                        debug("r%02i = 0x%02x", i, cpu->cd.avr.r[i]);
                        debug((i % 4) == 3? "\n" : "   ");
                }
        }

        debug("cpu%i: nr of instructions: %lli\n", x,
            (long long)cpu->machine->ncycles);
        debug("cpu%i: nr of cycles:       %lli\n", x,
            (long long)(cpu->machine->ncycles + cpu->cd.avr.extra_cycles));
}


/*
 *  avr_cpu_register_match():
 */
void avr_cpu_register_match(struct machine *m, char *name,
        int writeflag, uint64_t *valuep, int *match_register)
{
        int cpunr = 0;

        /*  CPU number:  */
        /*  TODO  */

        if (strcasecmp(name, "pc") == 0) {
                if (writeflag) {
                        m->cpus[cpunr]->pc = *valuep;
                } else
                        *valuep = m->cpus[cpunr]->pc;
                *match_register = 1;
        } else if (name[0] == 'r' && isdigit((int)name[1])) {
                int nr = atoi(name + 1);
                if (nr >= 0 && nr < N_AVR_REGS) {
                        if (writeflag)
                                m->cpus[cpunr]->cd.avr.r[nr] = *valuep;
                        else
                                *valuep = m->cpus[cpunr]->cd.avr.r[nr];
                        *match_register = 1;
                }
        }
}


/*
 *  avr_cpu_show_full_statistics():
 *
 *  Show detailed statistics on opcode usage on each cpu.
 */
void avr_cpu_show_full_statistics(struct machine *m)
{
        fatal("avr_cpu_show_full_statistics(): TODO\n");
}


/*
 *  avr_cpu_tlbdump():
 *
 *  Called from the debugger to dump the TLB in a readable format.
 *  x is the cpu number to dump, or -1 to dump all CPUs.
 *
 *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
 *  just dumped.
 */
void avr_cpu_tlbdump(struct machine *m, int x, int rawflag)
{
        fatal("avr_cpu_tlbdump(): TODO\n");
}


/*
 *  avr_cpu_interrupt():
 */
int avr_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
{
        fatal("avr_cpu_interrupt(): TODO\n");
        return 0;
}


/*
 *  avr_cpu_interrupt_ack():
 */
int avr_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
{
        /*  fatal("avr_cpu_interrupt_ack(): TODO\n");  */
        return 0;
}


/*  Helper functions:  */
static void print_two(unsigned char *instr, int *len)
{ debug(" %02x %02x", instr[*len], instr[*len+1]); (*len) += 2; }
static void print_spaces(int len) { int i; debug(" "); for (i=0; i<15-len/2*6;
    i++) debug(" "); }


/*
 *  avr_cpu_disassemble_instr():
 *
 *  Convert an instruction word into human readable format, for instruction
 *  tracing and disassembly.
 *
 *  If running is 1, cpu->pc should be the address of the instruction.
 *
 *  If running is 0, things that depend on the runtime environment (eg.
 *  register contents) will not be shown, and addr will be used instead of
 *  cpu->pc for relative addresses.
 */
int avr_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
        int running, uint64_t dumpaddr, int bintrans)
{
        uint64_t offset;
        int len = 0, addr, iw, rd, rr, imm;
        char *symbol;
        char *sreg_names = SREG_NAMES;

        if (running)
                dumpaddr = cpu->pc;

        symbol = get_symbol_name(&cpu->machine->symbol_context,
            dumpaddr, &offset);
        if (symbol != NULL && offset==0)
                debug("<%s>\n", symbol);

        if (cpu->machine->ncpus > 1 && running)
                debug("cpu%i: ", cpu->cpu_id);

        /*  TODO: 22-bit PC  */
        debug("0x%04x: ", (int)dumpaddr);

        print_two(ib, &len);
        iw = (ib[1] << 8) + ib[0];

        if ((iw & 0xffff) == 0x0000) {
                print_spaces(len);
                debug("nop\n");
        } else if ((iw & 0xfc00) == 0x0c00) {
                print_spaces(len);
                rd = (iw & 0x1f0) >> 4;
                rr = ((iw & 0x200) >> 5) | (iw & 0xf);
                debug("add\tr%i,r%i\n", rd, rr);
        } else if ((iw & 0xfc00) == 0x1c00) {
                print_spaces(len);
                rd = (iw & 0x1f0) >> 4;
                rr = ((iw & 0x200) >> 5) | (iw & 0xf);
                debug("adc\tr%i,r%i\n", rd, rr);
        } else if ((iw & 0xfc00) == 0x2000) {
                print_spaces(len);
                rd = (iw & 0x1f0) >> 4;
                rr = ((iw & 0x200) >> 5) | (iw & 0xf);
                debug("and\tr%i,r%i\n", rd, rr);
        } else if ((iw & 0xfc00) == 0x2c00) {
                print_spaces(len);
                rd = (iw & 0x1f0) >> 4;
                rr = ((iw & 0x200) >> 5) | (iw & 0xf);
                debug("mov\tr%i,r%i\n", rd, rr);
        } else if ((iw & 0xfe0f) == 0x8000) {
                print_spaces(len);
                rd = (iw >> 4) & 31;
                debug("ld\tr%i,Z\n", rd);
        } else if ((iw & 0xfe0f) == 0x8008) {
                print_spaces(len);
                rd = (iw >> 4) & 31;
                debug("ld\tr%i,Y\n", rd);
        } else if ((iw & 0xfe0f) == 0x900c) {
                print_spaces(len);
                rd = (iw >> 4) & 31;
                debug("ld\tr%i,X\n", rd);
        } else if ((iw & 0xfc0f) == 0x900f) {
                print_spaces(len);
                rd = (iw >> 4) & 31;
                debug("%s\tr%i\n", iw & 0x200? "push" : "pop", rd);
        } else if ((iw & 0xfe0f) == 0x9200) {
                print_two(ib, &len);
                addr = (ib[3] << 8) + ib[2];
                print_spaces(len);
                debug("sts\t0x%x,r%i\n", addr, (iw & 0x1f0) >> 4);
        } else if ((iw & 0xfe0f) == 0x9402) {
                print_spaces(len);
                rd = (iw >> 4) & 31;
                debug("swap\tr%i\n", rd);
        } else if ((iw & 0xff0f) == 0x9408) {
                print_spaces(len);
                rd = (iw >> 4) & 7;
                debug("%s%c\n", iw & 0x80? "cl" : "se", sreg_names[rd]);
        } else if ((iw & 0xffef) == 0x9508) {
                /*  ret and reti  */
                print_spaces(len);
                debug("ret%s\n", (iw & 0x10)? "i" : "");
        } else if ((iw & 0xffff) == 0x9588) {
                print_spaces(len);
                debug("sleep\n");
        } else if ((iw & 0xffff) == 0x95a8) {
                print_spaces(len);
                debug("wdr\n");
        } else if ((iw & 0xff00) == 0x9600) {
                print_spaces(len);
                imm = ((iw & 0xc0) >> 2) | (iw & 0xf);
                rd = ((iw >> 4) & 3) * 2 + 24;
                debug("adiw\tr%i:r%i,0x%x\n", rd, rd+1, imm);
        } else if ((iw & 0xe000) == 0xc000) {
                print_spaces(len);
                addr = (int16_t)((iw & 0xfff) << 4);
                addr = (addr >> 3) + dumpaddr + 2;
                debug("%s\t0x%x\n", iw & 0x1000? "rcall" : "rjmp", addr);
        } else if ((iw & 0xf000) == 0xe000) {
                print_spaces(len);
                rd = ((iw >> 4) & 0xf) + 16;
                imm = ((iw >> 4) & 0xf0) | (iw & 0xf);
                debug("ldi\tr%i,0x%x\n", rd, imm);
        } else {
                print_spaces(len);
                debug("UNIMPLEMENTED 0x%04x\n", iw);
        }

        return len;
}


#include "tmp_avr_tail.c"

1	dpavlin	14	/*
2			* Copyright (C) 2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	18	* $Id: cpu_avr.c,v 1.5 2005/10/22 17:24:20 debug Exp $
29	dpavlin	14	*
30			* Atmel AVR (8-bit) CPU emulation.
31			*/
32
33			#include <stdio.h>
34			#include <stdlib.h>
35			#include <string.h>
36			#include <ctype.h>
37
38			#include "cpu.h"
39			#include "machine.h"
40			#include "memory.h"
41			#include "misc.h"
42			#include "symbol.h"
43
44
45			#define DYNTRANS_32
46			#include "tmp_avr_head.c"
47
48
49			/*
50			* avr_cpu_new():
51			*
52			* Create a new AVR cpu object.
53			*
54			* Returns 1 on success, 0 if there was no matching AVR processor with
55			* this cpu_type_name.
56			*/
57			int avr_cpu_new(struct cpu cpu, struct memory mem, struct machine *machine,
58			int cpu_id, char *cpu_type_name)
59			{
60			if (strcasecmp(cpu_type_name, "AVR") != 0)
61			return 0;
62
63			cpu->memory_rw = avr_memory_rw;
64			cpu->update_translation_table = avr_update_translation_table;
65	dpavlin	18	cpu->invalidate_translation_caches =
66			avr_invalidate_translation_caches;
67	dpavlin	14	cpu->invalidate_code_translation = avr_invalidate_code_translation;
68			cpu->is_32bit = 1;
69
70			cpu->byte_order = EMUL_LITTLE_ENDIAN;
71
72			cpu->cd.avr.pc_mask = 0xffff;
73
74			/* Only show name and caches etc for CPU nr 0 (in SMP machines): */
75			if (cpu_id == 0) {
76			debug("%s", cpu->name);
77			}
78
79			return 1;
80			}
81
82
83			/*
84			* avr_cpu_list_available_types():
85			*
86			* Print a list of available AVR CPU types.
87			*/
88			void avr_cpu_list_available_types(void)
89			{
90			debug("AVR\n");
91			/* TODO */
92			}
93
94
95			/*
96			* avr_cpu_dumpinfo():
97			*/
98			void avr_cpu_dumpinfo(struct cpu *cpu)
99			{
100			/* TODO */
101			debug("\n");
102			}
103
104
105			/*
106			* avr_cpu_register_dump():
107			*
108			* Dump cpu registers in a relatively readable format.
109			*
110			* gprs: set to non-zero to dump GPRs and some special-purpose registers.
111			* coprocs: set bit 0..3 to dump registers in coproc 0..3.
112			*/
113			void avr_cpu_register_dump(struct cpu *cpu, int gprs, int coprocs)
114			{
115			char *symbol;
116			uint64_t offset;
117			int i, x = cpu->cpu_id;
118
119			if (gprs) {
120			/* Special registers (pc, ...) first: */
121			symbol = get_symbol_name(&cpu->machine->symbol_context,
122			cpu->pc, &offset);
123
124			debug("cpu%i: sreg = ", x);
125			debug("%c", cpu->cd.avr.sreg & AVR_SREG_I? 'I' : 'i');
126			debug("%c", cpu->cd.avr.sreg & AVR_SREG_T? 'T' : 't');
127			debug("%c", cpu->cd.avr.sreg & AVR_SREG_H? 'H' : 'h');
128			debug("%c", cpu->cd.avr.sreg & AVR_SREG_S? 'S' : 's');
129			debug("%c", cpu->cd.avr.sreg & AVR_SREG_V? 'V' : 'v');
130			debug("%c", cpu->cd.avr.sreg & AVR_SREG_N? 'N' : 'n');
131			debug("%c", cpu->cd.avr.sreg & AVR_SREG_Z? 'Z' : 'z');
132			debug("%c", cpu->cd.avr.sreg & AVR_SREG_C? 'C' : 'c');
133			debug(" pc = 0x%04x", x, (int)cpu->pc);
134			debug(" <%s>\n", symbol != NULL? symbol : " no symbol ");
135
136			for (i=0; i<N_AVR_REGS; i++) {
137			if ((i % 4) == 0)
138			debug("cpu%i:\t", x);
139			debug("r%02i = 0x%02x", i, cpu->cd.avr.r[i]);
140			debug((i % 4) == 3? "\n" : " ");
141			}
142			}
143
144			debug("cpu%i: nr of instructions: %lli\n", x,
145			(long long)cpu->machine->ncycles);
146			debug("cpu%i: nr of cycles: %lli\n", x,
147			(long long)(cpu->machine->ncycles + cpu->cd.avr.extra_cycles));
148			}
149
150
151			/*
152			* avr_cpu_register_match():
153			*/
154			void avr_cpu_register_match(struct machine m, char name,
155			int writeflag, uint64_t valuep, int match_register)
156			{
157			int cpunr = 0;
158
159			/* CPU number: */
160			/* TODO */
161
162			if (strcasecmp(name, "pc") == 0) {
163			if (writeflag) {
164			m->cpus[cpunr]->pc = *valuep;
165			} else
166			*valuep = m->cpus[cpunr]->pc;
167			*match_register = 1;
168			} else if (name[0] == 'r' && isdigit((int)name[1])) {
169			int nr = atoi(name + 1);
170			if (nr >= 0 && nr < N_AVR_REGS) {
171			if (writeflag)
172			m->cpus[cpunr]->cd.avr.r[nr] = *valuep;
173			else
174			*valuep = m->cpus[cpunr]->cd.avr.r[nr];
175			*match_register = 1;
176			}
177			}
178			}
179
180
181			/*
182			* avr_cpu_show_full_statistics():
183			*
184			* Show detailed statistics on opcode usage on each cpu.
185			*/
186			void avr_cpu_show_full_statistics(struct machine *m)
187			{
188			fatal("avr_cpu_show_full_statistics(): TODO\n");
189			}
190
191
192			/*
193			* avr_cpu_tlbdump():
194			*
195			* Called from the debugger to dump the TLB in a readable format.
196			* x is the cpu number to dump, or -1 to dump all CPUs.
197			*
198			* If rawflag is nonzero, then the TLB contents isn't formated nicely,
199			* just dumped.
200			*/
201			void avr_cpu_tlbdump(struct machine *m, int x, int rawflag)
202			{
203			fatal("avr_cpu_tlbdump(): TODO\n");
204			}
205
206
207			/*
208			* avr_cpu_interrupt():
209			*/
210			int avr_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)
211			{
212			fatal("avr_cpu_interrupt(): TODO\n");
213			return 0;
214			}
215
216
217			/*
218			* avr_cpu_interrupt_ack():
219			*/
220			int avr_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)
221			{
222			/* fatal("avr_cpu_interrupt_ack(): TODO\n"); */
223			return 0;
224			}
225
226
227			/* Helper functions: */
228			static void print_two(unsigned char instr, int len)
229			{ debug(" %02x %02x", instr[len], instr[len+1]); (*len) += 2; }
230			static void print_spaces(int len) { int i; debug(" "); for (i=0; i<15-len/2*6;
231			i++) debug(" "); }
232
233
234			/*
235			* avr_cpu_disassemble_instr():
236			*
237			* Convert an instruction word into human readable format, for instruction
238			* tracing and disassembly.
239			*
240			* If running is 1, cpu->pc should be the address of the instruction.
241			*
242			* If running is 0, things that depend on the runtime environment (eg.
243			* register contents) will not be shown, and addr will be used instead of
244			* cpu->pc for relative addresses.
245			*/
246			int avr_cpu_disassemble_instr(struct cpu cpu, unsigned char ib,
247			int running, uint64_t dumpaddr, int bintrans)
248			{
249			uint64_t offset;
250			int len = 0, addr, iw, rd, rr, imm;
251			char *symbol;
252			char *sreg_names = SREG_NAMES;
253
254			if (running)
255			dumpaddr = cpu->pc;
256
257			symbol = get_symbol_name(&cpu->machine->symbol_context,
258			dumpaddr, &offset);
259			if (symbol != NULL && offset==0)
260			debug("<%s>\n", symbol);
261
262			if (cpu->machine->ncpus > 1 && running)
263			debug("cpu%i: ", cpu->cpu_id);
264
265			/* TODO: 22-bit PC */
266			debug("0x%04x: ", (int)dumpaddr);
267
268			print_two(ib, &len);
269			iw = (ib[1] << 8) + ib[0];
270
271			if ((iw & 0xffff) == 0x0000) {
272			print_spaces(len);
273			debug("nop\n");
274			} else if ((iw & 0xfc00) == 0x0c00) {
275			print_spaces(len);
276			rd = (iw & 0x1f0) >> 4;
277			rr = ((iw & 0x200) >> 5) \| (iw & 0xf);
278			debug("add\tr%i,r%i\n", rd, rr);
279			} else if ((iw & 0xfc00) == 0x1c00) {
280			print_spaces(len);
281			rd = (iw & 0x1f0) >> 4;
282			rr = ((iw & 0x200) >> 5) \| (iw & 0xf);
283			debug("adc\tr%i,r%i\n", rd, rr);
284			} else if ((iw & 0xfc00) == 0x2000) {
285			print_spaces(len);
286			rd = (iw & 0x1f0) >> 4;
287			rr = ((iw & 0x200) >> 5) \| (iw & 0xf);
288			debug("and\tr%i,r%i\n", rd, rr);
289			} else if ((iw & 0xfc00) == 0x2c00) {
290			print_spaces(len);
291			rd = (iw & 0x1f0) >> 4;
292			rr = ((iw & 0x200) >> 5) \| (iw & 0xf);
293			debug("mov\tr%i,r%i\n", rd, rr);
294			} else if ((iw & 0xfe0f) == 0x8000) {
295			print_spaces(len);
296			rd = (iw >> 4) & 31;
297			debug("ld\tr%i,Z\n", rd);
298			} else if ((iw & 0xfe0f) == 0x8008) {
299			print_spaces(len);
300			rd = (iw >> 4) & 31;
301			debug("ld\tr%i,Y\n", rd);
302			} else if ((iw & 0xfe0f) == 0x900c) {
303			print_spaces(len);
304			rd = (iw >> 4) & 31;
305			debug("ld\tr%i,X\n", rd);
306			} else if ((iw & 0xfc0f) == 0x900f) {
307			print_spaces(len);
308			rd = (iw >> 4) & 31;
309			debug("%s\tr%i\n", iw & 0x200? "push" : "pop", rd);
310			} else if ((iw & 0xfe0f) == 0x9200) {
311			print_two(ib, &len);
312			addr = (ib[3] << 8) + ib[2];
313			print_spaces(len);
314			debug("sts\t0x%x,r%i\n", addr, (iw & 0x1f0) >> 4);
315			} else if ((iw & 0xfe0f) == 0x9402) {
316			print_spaces(len);
317			rd = (iw >> 4) & 31;
318			debug("swap\tr%i\n", rd);
319			} else if ((iw & 0xff0f) == 0x9408) {
320			print_spaces(len);
321			rd = (iw >> 4) & 7;
322			debug("%s%c\n", iw & 0x80? "cl" : "se", sreg_names[rd]);
323			} else if ((iw & 0xffef) == 0x9508) {
324			/* ret and reti */
325			print_spaces(len);
326			debug("ret%s\n", (iw & 0x10)? "i" : "");
327			} else if ((iw & 0xffff) == 0x9588) {
328			print_spaces(len);
329			debug("sleep\n");
330			} else if ((iw & 0xffff) == 0x95a8) {
331			print_spaces(len);
332			debug("wdr\n");
333			} else if ((iw & 0xff00) == 0x9600) {
334			print_spaces(len);
335			imm = ((iw & 0xc0) >> 2) \| (iw & 0xf);
336			rd = ((iw >> 4) & 3) * 2 + 24;
337			debug("adiw\tr%i:r%i,0x%x\n", rd, rd+1, imm);
338			} else if ((iw & 0xe000) == 0xc000) {
339			print_spaces(len);
340			addr = (int16_t)((iw & 0xfff) << 4);
341			addr = (addr >> 3) + dumpaddr + 2;
342			debug("%s\t0x%x\n", iw & 0x1000? "rcall" : "rjmp", addr);
343			} else if ((iw & 0xf000) == 0xe000) {
344			print_spaces(len);
345			rd = ((iw >> 4) & 0xf) + 16;
346			imm = ((iw >> 4) & 0xf0) \| (iw & 0xf);
347			debug("ldi\tr%i,0x%x\n", rd, imm);
348			} else {
349			print_spaces(len);
350			debug("UNIMPLEMENTED 0x%04x\n", iw);
351			}
352
353			return len;
354			}
355
356
357			#include "tmp_avr_tail.c"
358