/[gxemul]/trunk/src/cpus/cpu_arm_instr_loadstore.c
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Diff of /trunk/src/cpus/cpu_arm_instr_loadstore.c

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revision 16 by dpavlin, Mon Oct 8 16:19:01 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_arm_instr_loadstore.c,v 1.9 2005/10/09 21:32:07 debug Exp $   *  $Id: cpu_arm_instr_loadstore.c,v 1.20 2006/02/16 19:49:04 debug Exp $
29   *   *
30   *   *
31   *  TODO:  Many things...   *  TODO:  Many things...
# Line 35  Line 35 
35   *      o)  Alignment checks!   *      o)  Alignment checks!
36   *   *
37   *      o)  Native load/store if the endianness is the same as the host's   *      o)  Native load/store if the endianness is the same as the host's
38     *          (only implemented for little endian, so far, and it assumes that
39     *          alignment is correct!)
40   *   *
41   *      o)  "Base Updated Abort Model", which updates the base register   *      o)  "Base Updated Abort Model", which updates the base register
42   *          even if the memory access failed.   *          even if the memory access failed.
# Line 51  Line 53 
53   */   */
54    
55    
56    #if defined(A__SIGNED) && !defined(A__H) && !defined(A__L)
57    #define A__LDRD
58    #endif
59    #if defined(A__SIGNED) && defined(A__H) && !defined(A__L)
60    #define A__STRD
61    #endif
62    
63    
64  /*  /*
65   *  General load/store, by using memory_rw(). If at all possible, memory_rw()   *  General load/store, by using memory_rw(). If at all possible, memory_rw()
66   *  then inserts the page into the translation array, so that the fast   *  then inserts the page into the translation array, so that the fast
# Line 63  void A__NAME__general(struct cpu *cpu, s Line 73  void A__NAME__general(struct cpu *cpu, s
73  #else  #else
74          const int memory_rw_flags = CACHE_DATA;          const int memory_rw_flags = CACHE_DATA;
75  #endif  #endif
76    
77  #ifdef A__REG  #ifdef A__REG
78          uint32_t (*reg_func)(struct cpu *, struct arm_instr_call *)          uint32_t (*reg_func)(struct cpu *, struct arm_instr_call *)
79              = (void *)(size_t)ic->arg[1];              = (void *)(size_t)ic->arg[1];
80  #endif  #endif
81    
82    #if defined(A__STRD) || defined(A__LDRD)
83            unsigned char data[8];
84            const int datalen = 8;
85    #else
86  #ifdef A__B  #ifdef A__B
87          unsigned char data[1];          unsigned char data[1];
88            const int datalen = 1;
89  #else  #else
90  #ifdef A__H  #ifdef A__H
91          unsigned char data[2];          unsigned char data[2];
92            const int datalen = 2;
93    #else
94            const int datalen = 4;
95    #ifdef HOST_LITTLE_ENDIAN
96            unsigned char *data = (unsigned char *) ic->arg[2];
97  #else  #else
98          unsigned char data[4];          unsigned char data[4];
99  #endif  #endif
100  #endif  #endif
101    #endif
102    #endif
103    
104          uint32_t addr, low_pc, offset =          uint32_t addr, low_pc, offset =
105  #ifndef A__U  #ifndef A__U
106              -              -
# Line 88  void A__NAME__general(struct cpu *cpu, s Line 113  void A__NAME__general(struct cpu *cpu, s
113    
114          low_pc = ((size_t)ic - (size_t)cpu->cd.arm.          low_pc = ((size_t)ic - (size_t)cpu->cd.arm.
115              cur_ic_page) / sizeof(struct arm_instr_call);              cur_ic_page) / sizeof(struct arm_instr_call);
116          cpu->cd.arm.r[ARM_PC] &= ~((ARM_IC_ENTRIES_PER_PAGE-1)          cpu->pc &= ~((ARM_IC_ENTRIES_PER_PAGE-1)
117              << ARM_INSTR_ALIGNMENT_SHIFT);              << ARM_INSTR_ALIGNMENT_SHIFT);
118          cpu->cd.arm.r[ARM_PC] += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);          cpu->pc += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);
         cpu->pc = cpu->cd.arm.r[ARM_PC];  
119    
120          addr = reg(ic->arg[0])          addr = reg(ic->arg[0])
121  #ifdef A__P  #ifdef A__P
# Line 99  void A__NAME__general(struct cpu *cpu, s Line 123  void A__NAME__general(struct cpu *cpu, s
123  #endif  #endif
124              ;              ;
125    
126  #ifdef A__L  
127    #if defined(A__L) || defined(A__LDRD)
128          /*  Load:  */          /*  Load:  */
129          if (!cpu->memory_rw(cpu, cpu->mem, addr, data, sizeof(data),          if (!cpu->memory_rw(cpu, cpu->mem, addr, data, datalen,
130              MEM_READ, memory_rw_flags)) {              MEM_READ, memory_rw_flags)) {
131                  /*  load failed, an exception was generated  */                  /*  load failed, an exception was generated  */
132                  return;                  return;
133          }          }
134  #ifdef A__B  #if defined(A__B) && !defined(A__LDRD)
135          reg(ic->arg[2]) =          reg(ic->arg[2]) =
136  #ifdef A__SIGNED  #ifdef A__SIGNED
137              (int32_t)(int8_t)              (int32_t)(int8_t)
138  #endif  #endif
139              data[0];              data[0];
140  #else  #else
141  #ifdef A__H  #if defined(A__H) && !defined(A__LDRD)
142          reg(ic->arg[2]) =          reg(ic->arg[2]) =
143  #ifdef A__SIGNED  #ifdef A__SIGNED
144              (int32_t)(int16_t)              (int32_t)(int16_t)
145  #endif  #endif
146              (data[0] + (data[1] << 8));              (data[0] + (data[1] << 8));
147  #else  #else
148    #ifndef A__LDRD
149    #ifdef HOST_LITTLE_ENDIAN
150            /*  Nothing.  */
151    #else
152          reg(ic->arg[2]) = data[0] + (data[1] << 8) +          reg(ic->arg[2]) = data[0] + (data[1] << 8) +
153              (data[2] << 16) + (data[3] << 24);              (data[2] << 16) + (data[3] << 24);
154  #endif  #endif
155    #else
156            reg(ic->arg[2]) = data[0] + (data[1] << 8) +
157                (data[2] << 16) + (data[3] << 24);
158            reg(((uint32_t *)ic->arg[2]) + 1) = data[4] + (data[5] << 8) +
159                (data[6] << 16) + (data[7] << 24);
160    #endif
161    #endif
162  #endif  #endif
163  #else  #else
164          /*  Store:  */          /*  Store:  */
165  #ifdef A__B  #if !defined(A__B) && !defined(A__H) && defined(HOST_LITTLE_ENDIAN)
166          data[0] = reg(ic->arg[2]);  #ifdef A__STRD
167            *(uint32_t *)data = reg(ic->arg[2]);
168            *(uint32_t *)(data + 4) = reg(ic->arg[2] + 4);
169    #endif
170  #else  #else
 #ifdef A__H  
171          data[0] = reg(ic->arg[2]);          data[0] = reg(ic->arg[2]);
172    #ifndef A__B
173          data[1] = reg(ic->arg[2]) >> 8;          data[1] = reg(ic->arg[2]) >> 8;
174  #else  #if !defined(A__H) || defined(A__STRD)
         data[0] = reg(ic->arg[2]);  
175          data[1] = reg(ic->arg[2]) >> 8;          data[1] = reg(ic->arg[2]) >> 8;
176          data[2] = reg(ic->arg[2]) >> 16;          data[2] = reg(ic->arg[2]) >> 16;
177          data[3] = reg(ic->arg[2]) >> 24;          data[3] = reg(ic->arg[2]) >> 24;
178    #ifdef A__STRD
179            data[4] = reg(ic->arg[2] + 4);
180            data[5] = reg(ic->arg[2] + 4) >> 8;
181            data[6] = reg(ic->arg[2] + 4) >> 16;
182            data[7] = reg(ic->arg[2] + 4) >> 24;
183    #endif
184    #endif
185  #endif  #endif
186  #endif  #endif
187          if (!cpu->memory_rw(cpu, cpu->mem, addr, data, sizeof(data),          if (!cpu->memory_rw(cpu, cpu->mem, addr, data, datalen,
188              MEM_WRITE, memory_rw_flags)) {              MEM_WRITE, memory_rw_flags)) {
189                  /*  store failed, an exception was generated  */                  /*  store failed, an exception was generated  */
190                  return;                  return;
# Line 161  void A__NAME__general(struct cpu *cpu, s Line 206  void A__NAME__general(struct cpu *cpu, s
206   */   */
207  void A__NAME(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME(struct cpu *cpu, struct arm_instr_call *ic)
208  {  {
209  #if !defined(A__P) && defined(A__W)  #if defined(A__LDRD) || defined(A__STRD)
210          /*  T-bit: userland access. Use the general routine for that.  */          /*  Chicken out, let's do this unoptimized for now:  */
211          A__NAME__general(cpu, ic);          A__NAME__general(cpu, ic);
212  #else  #else
213  #ifdef A__REG  #ifdef A__REG
# Line 191  void A__NAME(struct cpu *cpu, struct arm Line 236  void A__NAME(struct cpu *cpu, struct arm
236  #endif  #endif
237              [addr >> 12];              [addr >> 12];
238    
239    
240    #if !defined(A__P) && defined(A__W)
241            /*
242             *  T-bit: userland access: check the corresponding bit in the
243             *  is_userpage array. If it is set, then we're ok. Otherwise: use the
244             *  generic function.
245             */
246            uint32_t x = cpu->cd.arm.is_userpage[addr >> 17];
247            if (!(x & (1 << ((addr >> 12) & 31))))
248                    A__NAME__general(cpu, ic);
249            else
250    #endif
251    
252    
253          if (page == NULL) {          if (page == NULL) {
254                  A__NAME__general(cpu, ic);                  A__NAME__general(cpu, ic);
255          } else {          } else {
256  #ifdef A__L  #ifdef A__L
257  #ifdef A__B  #ifdef A__B
# Line 209  void A__NAME(struct cpu *cpu, struct arm Line 268  void A__NAME(struct cpu *cpu, struct arm
268  #endif  #endif
269                      (page[addr & 0xfff] + (page[(addr & 0xfff) + 1] << 8));                      (page[addr & 0xfff] + (page[(addr & 0xfff) + 1] << 8));
270  #else  #else
271    #ifdef HOST_LITTLE_ENDIAN
272                    reg(ic->arg[2]) = *(uint32_t *)(page + (addr & 0xffc));
273    #else
274                  reg(ic->arg[2]) = page[addr & 0xfff] +                  reg(ic->arg[2]) = page[addr & 0xfff] +
275                      (page[(addr & 0xfff) + 1] << 8) +                      (page[(addr & 0xfff) + 1] << 8) +
276                      (page[(addr & 0xfff) + 2] << 16) +                      (page[(addr & 0xfff) + 2] << 16) +
277                      (page[(addr & 0xfff) + 3] << 24);                      (page[(addr & 0xfff) + 3] << 24);
278  #endif  #endif
279  #endif  #endif
280    #endif
281  #else  #else
282  #ifdef A__B  #ifdef A__B
283                  page[addr & 0xfff] = reg(ic->arg[2]);                  page[addr & 0xfff] = reg(ic->arg[2]);
# Line 223  void A__NAME(struct cpu *cpu, struct arm Line 286  void A__NAME(struct cpu *cpu, struct arm
286                  page[addr & 0xfff] = reg(ic->arg[2]);                  page[addr & 0xfff] = reg(ic->arg[2]);
287                  page[(addr & 0xfff)+1] = reg(ic->arg[2]) >> 8;                  page[(addr & 0xfff)+1] = reg(ic->arg[2]) >> 8;
288  #else  #else
289    #ifdef HOST_LITTLE_ENDIAN
290                    *(uint32_t *)(page + (addr & 0xffc)) = reg(ic->arg[2]);
291    #else
292                  page[addr & 0xfff] = reg(ic->arg[2]);                  page[addr & 0xfff] = reg(ic->arg[2]);
293                  page[(addr & 0xfff)+1] = reg(ic->arg[2]) >> 8;                  page[(addr & 0xfff)+1] = reg(ic->arg[2]) >> 8;
294                  page[(addr & 0xfff)+2] = reg(ic->arg[2]) >> 16;                  page[(addr & 0xfff)+2] = reg(ic->arg[2]) >> 16;
# Line 230  void A__NAME(struct cpu *cpu, struct arm Line 296  void A__NAME(struct cpu *cpu, struct arm
296  #endif  #endif
297  #endif  #endif
298  #endif  #endif
299    #endif
300    
301                  /*  Index Write-back:  */                  /*  Index Write-back:  */
302  #ifdef A__P  #ifdef A__P
# Line 241  void A__NAME(struct cpu *cpu, struct arm Line 308  void A__NAME(struct cpu *cpu, struct arm
308                  reg(ic->arg[0]) = addr + offset;                  reg(ic->arg[0]) = addr + offset;
309  #endif  #endif
310          }          }
311  #endif  /*  not T-bit  */  #endif  /*  not STRD  */
312  }  }
313    
314    
# Line 270  void A__NAME_PC(struct cpu *cpu, struct Line 337  void A__NAME_PC(struct cpu *cpu, struct
337                  uint32_t low_pc, tmp;                  uint32_t low_pc, tmp;
338                  low_pc = ((size_t)ic - (size_t) cpu->cd.arm.cur_ic_page) /                  low_pc = ((size_t)ic - (size_t) cpu->cd.arm.cur_ic_page) /
339                      sizeof(struct arm_instr_call);                      sizeof(struct arm_instr_call);
340                  tmp = cpu->cd.arm.r[ARM_PC] & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<                  tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
341                      ARM_INSTR_ALIGNMENT_SHIFT);                      ARM_INSTR_ALIGNMENT_SHIFT);
342                  tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);                  tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);
343                  cpu->cd.arm.tmp_pc = tmp + 8;                  cpu->cd.arm.tmp_pc = tmp + 8;
# Line 278  void A__NAME_PC(struct cpu *cpu, struct Line 345  void A__NAME_PC(struct cpu *cpu, struct
345          A__NAME(cpu, ic);          A__NAME(cpu, ic);
346          if (ic->arg[2] == (size_t)(&cpu->cd.arm.r[ARM_PC])) {          if (ic->arg[2] == (size_t)(&cpu->cd.arm.r[ARM_PC])) {
347                  cpu->pc = cpu->cd.arm.r[ARM_PC];                  cpu->pc = cpu->cd.arm.r[ARM_PC];
348                  arm_pc_to_pointers(cpu);                  quick_pc_to_pointers(cpu);
349                    if (cpu->machine->show_trace_tree)
350                            cpu_functioncall_trace(cpu, cpu->pc);
351          }          }
352  #else  #else
353          /*  Store:  */          /*  Store:  */
# Line 286  void A__NAME_PC(struct cpu *cpu, struct Line 355  void A__NAME_PC(struct cpu *cpu, struct
355          /*  Calculate tmp from this instruction's PC + 12  */          /*  Calculate tmp from this instruction's PC + 12  */
356          low_pc = ((size_t)ic - (size_t) cpu->cd.arm.cur_ic_page) /          low_pc = ((size_t)ic - (size_t) cpu->cd.arm.cur_ic_page) /
357              sizeof(struct arm_instr_call);              sizeof(struct arm_instr_call);
358          tmp = cpu->cd.arm.r[ARM_PC] & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<          tmp = cpu->pc & ~((ARM_IC_ENTRIES_PER_PAGE-1) <<
359              ARM_INSTR_ALIGNMENT_SHIFT);              ARM_INSTR_ALIGNMENT_SHIFT);
360          tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);          tmp += (low_pc << ARM_INSTR_ALIGNMENT_SHIFT);
361          cpu->cd.arm.tmp_pc = tmp + 12;          cpu->cd.arm.tmp_pc = tmp + 12;
# Line 298  void A__NAME_PC(struct cpu *cpu, struct Line 367  void A__NAME_PC(struct cpu *cpu, struct
367  #ifndef A__NOCONDITIONS  #ifndef A__NOCONDITIONS
368  /*  Load/stores with all registers except the PC register:  */  /*  Load/stores with all registers except the PC register:  */
369  void A__NAME__eq(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__eq(struct cpu *cpu, struct arm_instr_call *ic)
370  { if (cpu->cd.arm.cpsr & ARM_FLAG_Z) A__NAME(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_Z) A__NAME(cpu, ic); }
371  void A__NAME__ne(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__ne(struct cpu *cpu, struct arm_instr_call *ic)
372  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_Z)) A__NAME(cpu, ic); }
373  void A__NAME__cs(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__cs(struct cpu *cpu, struct arm_instr_call *ic)
374  { if (cpu->cd.arm.cpsr & ARM_FLAG_C) A__NAME(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_C) A__NAME(cpu, ic); }
375  void A__NAME__cc(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__cc(struct cpu *cpu, struct arm_instr_call *ic)
376  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_C)) A__NAME(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_C)) A__NAME(cpu, ic); }
377  void A__NAME__mi(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__mi(struct cpu *cpu, struct arm_instr_call *ic)
378  { if (cpu->cd.arm.cpsr & ARM_FLAG_N) A__NAME(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_N) A__NAME(cpu, ic); }
379  void A__NAME__pl(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__pl(struct cpu *cpu, struct arm_instr_call *ic)
380  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_N)) A__NAME(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_N)) A__NAME(cpu, ic); }
381  void A__NAME__vs(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__vs(struct cpu *cpu, struct arm_instr_call *ic)
382  { if (cpu->cd.arm.cpsr & ARM_FLAG_V) A__NAME(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_V) A__NAME(cpu, ic); }
383  void A__NAME__vc(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__vc(struct cpu *cpu, struct arm_instr_call *ic)
384  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_V)) A__NAME(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_V)) A__NAME(cpu, ic); }
385    
386  void A__NAME__hi(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__hi(struct cpu *cpu, struct arm_instr_call *ic)
387  { if (cpu->cd.arm.cpsr & ARM_FLAG_C &&  { if (cpu->cd.arm.flags & ARM_F_C &&
388  !(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_Z)) A__NAME(cpu, ic); }
389  void A__NAME__ls(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__ls(struct cpu *cpu, struct arm_instr_call *ic)
390  { if (cpu->cd.arm.cpsr & ARM_FLAG_Z ||  { if (cpu->cd.arm.flags & ARM_F_Z ||
391  !(cpu->cd.arm.cpsr & ARM_FLAG_C)) A__NAME(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_C)) A__NAME(cpu, ic); }
392  void A__NAME__ge(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__ge(struct cpu *cpu, struct arm_instr_call *ic)
393  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) ==  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) ==
394  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0)) A__NAME(cpu, ic); }  ((cpu->cd.arm.flags & ARM_F_V)?1:0)) A__NAME(cpu, ic); }
395  void A__NAME__lt(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__lt(struct cpu *cpu, struct arm_instr_call *ic)
396  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) !=  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) !=
397  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0)) A__NAME(cpu, ic); }  ((cpu->cd.arm.flags & ARM_F_V)?1:0)) A__NAME(cpu, ic); }
398  void A__NAME__gt(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__gt(struct cpu *cpu, struct arm_instr_call *ic)
399  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) ==  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) ==
400  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0) &&  ((cpu->cd.arm.flags & ARM_F_V)?1:0) &&
401  !(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_Z)) A__NAME(cpu, ic); }
402  void A__NAME__le(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME__le(struct cpu *cpu, struct arm_instr_call *ic)
403  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) !=  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) !=
404  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0) ||  ((cpu->cd.arm.flags & ARM_F_V)?1:0) ||
405  (cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME(cpu, ic); }  (cpu->cd.arm.flags & ARM_F_Z)) A__NAME(cpu, ic); }
406    
407    
408  /*  Load/stores with the PC register:  */  /*  Load/stores with the PC register:  */
409  void A__NAME_PC__eq(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__eq(struct cpu *cpu, struct arm_instr_call *ic)
410  { if (cpu->cd.arm.cpsr & ARM_FLAG_Z) A__NAME_PC(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_Z) A__NAME_PC(cpu, ic); }
411  void A__NAME_PC__ne(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__ne(struct cpu *cpu, struct arm_instr_call *ic)
412  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME_PC(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_Z)) A__NAME_PC(cpu, ic); }
413  void A__NAME_PC__cs(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__cs(struct cpu *cpu, struct arm_instr_call *ic)
414  { if (cpu->cd.arm.cpsr & ARM_FLAG_C) A__NAME_PC(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_C) A__NAME_PC(cpu, ic); }
415  void A__NAME_PC__cc(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__cc(struct cpu *cpu, struct arm_instr_call *ic)
416  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_C)) A__NAME_PC(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_C)) A__NAME_PC(cpu, ic); }
417  void A__NAME_PC__mi(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__mi(struct cpu *cpu, struct arm_instr_call *ic)
418  { if (cpu->cd.arm.cpsr & ARM_FLAG_N) A__NAME_PC(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_N) A__NAME_PC(cpu, ic); }
419  void A__NAME_PC__pl(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__pl(struct cpu *cpu, struct arm_instr_call *ic)
420  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_N)) A__NAME_PC(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_N)) A__NAME_PC(cpu, ic); }
421  void A__NAME_PC__vs(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__vs(struct cpu *cpu, struct arm_instr_call *ic)
422  { if (cpu->cd.arm.cpsr & ARM_FLAG_V) A__NAME_PC(cpu, ic); }  { if (cpu->cd.arm.flags & ARM_F_V) A__NAME_PC(cpu, ic); }
423  void A__NAME_PC__vc(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__vc(struct cpu *cpu, struct arm_instr_call *ic)
424  { if (!(cpu->cd.arm.cpsr & ARM_FLAG_V)) A__NAME_PC(cpu, ic); }  { if (!(cpu->cd.arm.flags & ARM_F_V)) A__NAME_PC(cpu, ic); }
425    
426  void A__NAME_PC__hi(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__hi(struct cpu *cpu, struct arm_instr_call *ic)
427  { if (cpu->cd.arm.cpsr & ARM_FLAG_C &&  { if (cpu->cd.arm.flags & ARM_F_C &&
428  !(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME_PC(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_Z)) A__NAME_PC(cpu, ic); }
429  void A__NAME_PC__ls(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__ls(struct cpu *cpu, struct arm_instr_call *ic)
430  { if (cpu->cd.arm.cpsr & ARM_FLAG_Z ||  { if (cpu->cd.arm.flags & ARM_F_Z ||
431  !(cpu->cd.arm.cpsr & ARM_FLAG_C)) A__NAME_PC(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_C)) A__NAME_PC(cpu, ic); }
432  void A__NAME_PC__ge(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__ge(struct cpu *cpu, struct arm_instr_call *ic)
433  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) ==  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) ==
434  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0)) A__NAME_PC(cpu, ic); }  ((cpu->cd.arm.flags & ARM_F_V)?1:0)) A__NAME_PC(cpu, ic); }
435  void A__NAME_PC__lt(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__lt(struct cpu *cpu, struct arm_instr_call *ic)
436  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) !=  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) !=
437  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0)) A__NAME_PC(cpu, ic); }  ((cpu->cd.arm.flags & ARM_F_V)?1:0)) A__NAME_PC(cpu, ic); }
438  void A__NAME_PC__gt(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__gt(struct cpu *cpu, struct arm_instr_call *ic)
439  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) ==  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) ==
440  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0) &&  ((cpu->cd.arm.flags & ARM_F_V)?1:0) &&
441  !(cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME_PC(cpu, ic); }  !(cpu->cd.arm.flags & ARM_F_Z)) A__NAME_PC(cpu, ic); }
442  void A__NAME_PC__le(struct cpu *cpu, struct arm_instr_call *ic)  void A__NAME_PC__le(struct cpu *cpu, struct arm_instr_call *ic)
443  { if (((cpu->cd.arm.cpsr & ARM_FLAG_N)?1:0) !=  { if (((cpu->cd.arm.flags & ARM_F_N)?1:0) !=
444  ((cpu->cd.arm.cpsr & ARM_FLAG_V)?1:0) ||  ((cpu->cd.arm.flags & ARM_F_V)?1:0) ||
445  (cpu->cd.arm.cpsr & ARM_FLAG_Z)) A__NAME_PC(cpu, ic); }  (cpu->cd.arm.flags & ARM_F_Z)) A__NAME_PC(cpu, ic); }
446  #endif  #endif
447    
448    
449    #ifdef A__LDRD
450    #undef A__LDRD
451    #endif
452    
453    #ifdef A__STRD
454    #undef A__STRD
455    #endif
456    
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