--- trunk/src/cpus/cpu_arm_coproc.c	2007/10/08 16:19:05	17
+++ trunk/src/cpus/cpu_arm_coproc.c	2007/10/08 16:19:11	18
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_arm_coproc.c,v 1.10 2005/10/07 22:10:51 debug Exp $
+ *  $Id: cpu_arm_coproc.c,v 1.13 2005/10/26 14:37:02 debug Exp $
  *
  *  ARM coprocessor emulation.
  */
@@ -83,9 +83,13 @@
 		old_control = cpu->cd.arm.control;
 		cpu->cd.arm.control = cpu->cd.arm.r[rd];
 		if ((old_control & ARM_CONTROL_MMU) !=
-		    (cpu->cd.arm.control & ARM_CONTROL_MMU))
+		    (cpu->cd.arm.control & ARM_CONTROL_MMU)) {
 			debug("[ %s the MMU ]\n", cpu->cd.arm.control &
 			    ARM_CONTROL_MMU? "enabling" : "disabling");
+			cpu->translate_address =
+			    cpu->cd.arm.control & ARM_CONTROL_MMU?
+			    arm_translate_address_mmu : arm_translate_address;
+		}
 		if ((old_control & ARM_CONTROL_ALIGN) !=
 		    (cpu->cd.arm.control & ARM_CONTROL_ALIGN))
 			debug("[ %s alignment checks ]\n", cpu->cd.arm.control &
@@ -163,10 +167,10 @@
 		/*  fatal("[ arm_coproc_15: TLB: op2=%i crm=%i rd=0x%08x ]\n",
 		    opcode2, crm, cpu->cd.arm.r[rd]);  */
 		if (opcode2 == 0)
-			cpu->invalidate_translation_caches_paddr(cpu, 0,
+			cpu->invalidate_translation_caches(cpu, 0,
 			    INVALIDATE_ALL);
 		else
-			cpu->invalidate_translation_caches_paddr(cpu,
+			cpu->invalidate_translation_caches(cpu,
 			    cpu->cd.arm.r[rd], INVALIDATE_VADDR);
 		break;
 
@@ -188,8 +192,8 @@
 		}
 		break;
 
-	case 15:/*  IMPLEMENTATION DEPENDANT!  */
-		fatal("[ arm_coproc_15: TODO: IMPLEMENTATION DEPENDANT! ]\n");
+	case 15:/*  IMPLEMENTATION DEPENDENT!  */
+		fatal("[ arm_coproc_15: TODO: IMPLEMENTATION DEPENDENT! ]\n");
 		break;
 
 	default:fatal("arm_coproc_15: unimplemented crn = %i\n", crn);