/[gxemul]/trunk/src/cpus/cpu_arm_coproc.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Diff of /trunk/src/cpus/cpu_arm_coproc.c

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC revision 24 by dpavlin, Mon Oct 8 16:19:56 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_arm_coproc.c,v 1.22 2006/02/17 18:38:30 debug Exp $   *  $Id: cpu_arm_coproc.c,v 1.23 2006/02/26 20:11:14 debug Exp $
29   *   *
30   *  ARM coprocessor emulation.   *  ARM coprocessor emulation.
31   */   */
# Line 37  Line 37 
37  #include <ctype.h>  #include <ctype.h>
38    
39  #include "cpu.h"  #include "cpu.h"
40    #include "machine.h"
41  #include "misc.h"  #include "misc.h"
42  #include "symbol.h"  #include "symbol.h"
43    
# Line 291  void arm_coproc_i80321_6(struct cpu *cpu Line 292  void arm_coproc_i80321_6(struct cpu *cpu
292          switch (crm) {          switch (crm) {
293    
294          case 0: switch (crn) {          case 0: switch (crn) {
295                  case 0: if (l_bit)                  case 0: if (l_bit) {
296                                  cpu->cd.arm.r[rd] = cpu->cd.arm.i80321_inten;                                  cpu->cd.arm.r[rd] = cpu->cd.arm.i80321_inten;
297                          else                                  fatal("TODO: XScale read from inten?\n");
298                                    exit(1);
299                            } else
300                                  cpu->cd.arm.i80321_inten = cpu->cd.arm.r[rd];                                  cpu->cd.arm.i80321_inten = cpu->cd.arm.r[rd];
301                          break;                          break;
302                  case 4: if (l_bit)                  case 4: if (l_bit)
# Line 319  void arm_coproc_i80321_6(struct cpu *cpu Line 322  void arm_coproc_i80321_6(struct cpu *cpu
322                  }                  }
323                  break;                  break;
324    
325          case 1:          case 1: /*  fatal("TIMER opcode1=%i opcode2=%i crn="
326  /* fatal("TIMER opcode1=%i opcode2=%i crn="      "%i crm=%i rd=%i l=%i)\n", opcode1, opcode2, crn, crm, rd, l_bit);  */
     "%i crm=%i rd=%i l=%i)\n", opcode1, opcode2, crn, crm, rd, l_bit); */  
327    
328                  switch (crn) {                  switch (crn) {
329                  case 0: /*  tmr0:  */                  case 0: /*  tmr0:  */

Legend:
Removed from v.22  
changed lines
  Added in v.24

  ViewVC Help
Powered by ViewVC 1.1.26