/[gxemul]/trunk/src/cpus/cpu_arm.c
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revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 1  Line 1 
1  /*  /*
2   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
3   *   *
4   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
5   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_arm.c,v 1.64 2006/09/09 09:04:32 debug Exp $   *  $Id: cpu_arm.c,v 1.71 2007/06/15 00:41:21 debug Exp $
29   *   *
30   *  ARM CPU emulation.   *  ARM CPU emulation.
31   *   *
# Line 39  Line 39 
39  #include <stdlib.h>  #include <stdlib.h>
40  #include <string.h>  #include <string.h>
41  #include <ctype.h>  #include <ctype.h>
42    #include <unistd.h>
43    
44  #include "arm_cpu_types.h"  #include "arm_cpu_types.h"
45  #include "cpu.h"  #include "cpu.h"
46    #include "interrupt.h"
47  #include "machine.h"  #include "machine.h"
48  #include "memory.h"  #include "memory.h"
49  #include "misc.h"  #include "misc.h"
50  #include "of.h"  #include "of.h"
51  #include "settings.h"  #include "settings.h"
52  #include "symbol.h"  #include "symbol.h"
53    #include "timer.h"
54    #include "useremul.h"
55    
56  #define DYNTRANS_32  #define DYNTRANS_32
57  #include "tmp_arm_head.c"  #include "tmp_arm_head.c"
58    
59    
60    extern int native_code_translation_enabled;
61    
62  /*  ARM symbolic register names and condition strings:  */  /*  ARM symbolic register names and condition strings:  */
63  static char *arm_regname[N_ARM_REGS] = ARM_REG_NAMES;  static char *arm_regname[N_ARM_REGS] = ARM_REG_NAMES;
64  static char *arm_condition_string[16] = ARM_CONDITION_STRINGS;  static char *arm_condition_string[16] = ARM_CONDITION_STRINGS;
# Line 68  static int arm_exception_to_mode[N_ARM_E Line 74  static int arm_exception_to_mode[N_ARM_E
74  void arm_pc_to_pointers(struct cpu *cpu);  void arm_pc_to_pointers(struct cpu *cpu);
75  #include "quick_pc_to_pointers.h"  #include "quick_pc_to_pointers.h"
76    
77    void arm_irq_interrupt_assert(struct interrupt *interrupt);
78    void arm_irq_interrupt_deassert(struct interrupt *interrupt);
79    
80    
81  /*  /*
82   *  arm_cpu_new():   *  arm_cpu_new():
# Line 169  int arm_cpu_new(struct cpu *cpu, struct Line 178  int arm_cpu_new(struct cpu *cpu, struct
178          for (i=0; i<N_ARM_REGS - 1; i++)          for (i=0; i<N_ARM_REGS - 1; i++)
179                  CPU_SETTINGS_ADD_REGISTER32(arm_regname[i], cpu->cd.arm.r[i]);                  CPU_SETTINGS_ADD_REGISTER32(arm_regname[i], cpu->cd.arm.r[i]);
180    
181            /*  Register the CPU's "IRQ" and "FIQ" interrupts:  */
182            {
183                    struct interrupt template;
184                    char name[50];
185                    snprintf(name, sizeof(name), "%s.irq", cpu->path);
186    
187                    memset(&template, 0, sizeof(template));
188                    template.line = 0;
189                    template.name = name;
190                    template.extra = cpu;
191                    template.interrupt_assert = arm_irq_interrupt_assert;
192                    template.interrupt_deassert = arm_irq_interrupt_deassert;
193                    interrupt_handler_register(&template);
194    
195                    /*  FIQ: TODO  */
196            }
197    
198            if (native_code_translation_enabled)
199                    cpu->sampling_timer = timer_add(CPU_SAMPLE_TIMER_HZ,
200                        arm_timer_sample_tick, cpu);
201    
202          return 1;          return 1;
203  }  }
204    
# Line 704  void arm_cpu_tlbdump(struct machine *m, Line 734  void arm_cpu_tlbdump(struct machine *m,
734  }  }
735    
736    
 static void add_response_word(struct cpu *cpu, char *r, uint32_t value,  
         size_t maxlen)  
 {  
         if (cpu->byte_order == EMUL_LITTLE_ENDIAN) {  
                 value = ((value & 0xff) << 24) +  
                         ((value & 0xff00) << 8) +  
                         ((value & 0xff0000) >> 8) +  
                         ((value & 0xff000000) >> 24);  
         }  
         snprintf(r + strlen(r), maxlen - strlen(r), "%08"PRIx32, value);  
 }  
   
   
 /*  
  *  arm_cpu_gdb_stub():  
  *  
  *  Execute a "remote GDB" command. Returns a newly allocated response string  
  *  on success, NULL on failure.  
  */  
 char *arm_cpu_gdb_stub(struct cpu *cpu, char *cmd)  
 {  
         if (strcmp(cmd, "g") == 0) {  
                 /*  15 gprs, pc, 8 fprs, fps, cpsr.  */  
                 int i;  
                 char *r;  
                 size_t len = 1 + 18 * sizeof(uint32_t);  
                 r = malloc(len);  
                 if (r == NULL) {  
                         fprintf(stderr, "out of memory\n");  
                         exit(1);  
                 }  
                 r[0] = '\0';  
                 for (i=0; i<15; i++)  
                         add_response_word(cpu, r, cpu->cd.arm.r[i], len);  
                 add_response_word(cpu, r, cpu->pc, len);  
                 /*  TODO: fprs:  */  
                 for (i=0; i<8; i++)  
                         add_response_word(cpu, r, 0, len);  
                 /*  TODO: fps  */  
                 add_response_word(cpu, r, 0, len);  
                 add_response_word(cpu, r, cpu->cd.arm.cpsr, len);  
                 return r;  
         }  
   
         if (cmd[0] == 'p') {  
                 int regnr = strtol(cmd + 1, NULL, 16);  
                 size_t len = 2 * sizeof(uint32_t) + 1;  
                 char *r = malloc(len);  
                 r[0] = '\0';  
                 if (regnr == ARM_PC) {  
                         add_response_word(cpu, r, cpu->pc, len);  
                 } else if (regnr >= 0 && regnr < ARM_PC) {  
                         add_response_word(cpu, r, cpu->cd.arm.r[regnr], len);  
                 } else if (regnr >= 0x10 && regnr <= 0x17) {  
                         /*  TODO: fprs  */  
                         add_response_word(cpu, r, 0, len);  
                         add_response_word(cpu, r, 0, len);  
                         add_response_word(cpu, r, 0, len);  
                 } else if (regnr == 0x18) {  
                         /*  TODO: fps  */  
                         add_response_word(cpu, r, 0, len);  
                 } else if (regnr == 0x19) {  
                         add_response_word(cpu, r, cpu->cd.arm.cpsr, len);  
                 }  
                 return r;  
         }  
   
         fatal("arm_cpu_gdb_stub(): TODO\n");  
         return NULL;  
 }  
   
   
737  /*  /*
738   *  arm_cpu_interrupt():   *  arm_irq_interrupt_assert():
739   *   *  arm_irq_interrupt_deassert():
  *  0..31 are used as footbridge interrupt numbers, 32..47 = ISA,  
  *  64 is used as a "re-assert" signal to cpu->machine->md_interrupt().  
  *  
  *  TODO: don't hardcode to footbridge!  
740   */   */
741  int arm_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr)  void arm_irq_interrupt_assert(struct interrupt *interrupt)
742  {  {
743          /*  fatal("arm_cpu_interrupt(): 0x%x\n", (int)irq_nr);  */          struct cpu *cpu = (struct cpu *) interrupt->extra;
744          if (irq_nr <= 64) {          cpu->cd.arm.irq_asserted = 1;
                 if (cpu->machine->md_interrupt != NULL)  
                         cpu->machine->md_interrupt(cpu->machine,  
                             cpu, irq_nr, 1);  
                 else  
                         fatal("arm_cpu_interrupt(): irq_nr=%i md_interrupt =="  
                             " NULL\n", (int)irq_nr);  
         } else {  
                 /*  Assert ARM IRQs:  */  
                 cpu->cd.arm.irq_asserted = 1;  
         }  
   
         return 1;  
745  }  }
746    void arm_irq_interrupt_deassert(struct interrupt *interrupt)
   
 /*  
  *  arm_cpu_interrupt_ack():  
  */  
 int arm_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr)  
747  {  {
748          if (irq_nr <= 64) {          struct cpu *cpu = (struct cpu *) interrupt->extra;
749                  if (cpu->machine->md_interrupt != NULL)          cpu->cd.arm.irq_asserted = 0;
                         cpu->machine->md_interrupt(cpu->machine,  
                             cpu, irq_nr, 0);  
         } else {  
                 /*  De-assert ARM IRQs:  */  
                 cpu->cd.arm.irq_asserted = 0;  
         }  
   
         return 1;  
750  }  }
751    
752    
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