--- trunk/src/cpus/cpu_arm.c	2007/10/08 16:19:37	22
+++ trunk/src/cpus/cpu_arm.c	2007/10/08 16:20:10	26
@@ -25,7 +25,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_arm.c,v 1.54 2006/02/09 20:02:58 debug Exp $
+ *  $Id: cpu_arm.c,v 1.60 2006/06/24 21:47:23 debug Exp $
  *
  *  ARM CPU emulation.
  *
@@ -97,7 +97,7 @@
 	cpu->invalidate_translation_caches =
 	    arm_invalidate_translation_caches;
 	cpu->invalidate_code_translation = arm_invalidate_code_translation;
-	cpu->translate_address = arm_translate_address;
+	cpu->translate_v2p = arm_translate_v2p;
 
 	cpu->cd.arm.cpu_type = cpu_type_defs[found];
 	cpu->name            = cpu->cd.arm.cpu_type.name;
@@ -185,7 +185,7 @@
 	}
 
 	cpu->cd.arm.control |= ARM_CONTROL_MMU;
-	cpu->translate_address = arm_translate_address_mmu;
+	cpu->translate_v2p = arm_translate_v2p_mmu;
 	cpu->cd.arm.dacr |= 0x00000003;
 	cpu->cd.arm.ttb = ttb_addr;
 
@@ -714,6 +714,92 @@
 
 
 /*
+ *  arm_cpu_tlbdump():
+ *
+ *  Called from the debugger to dump the TLB in a readable format.
+ *  x is the cpu number to dump, or -1 to dump all CPUs.
+ *
+ *  If rawflag is nonzero, then the TLB contents isn't formated nicely,
+ *  just dumped.
+ */
+void arm_cpu_tlbdump(struct machine *m, int x, int rawflag)
+{
+}
+
+
+static void add_response_word(struct cpu *cpu, char *r, uint32_t value,
+	size_t maxlen)
+{
+	if (cpu->byte_order == EMUL_LITTLE_ENDIAN) {
+		value = ((value & 0xff) << 24) +
+			((value & 0xff00) << 8) +
+			((value & 0xff0000) >> 8) +
+			((value & 0xff000000) >> 24);
+	}
+	snprintf(r + strlen(r), maxlen - strlen(r), "%08"PRIx32, value);
+}
+
+
+/*
+ *  arm_cpu_gdb_stub():
+ *
+ *  Execute a "remote GDB" command. Returns a newly allocated response string
+ *  on success, NULL on failure.
+ */
+char *arm_cpu_gdb_stub(struct cpu *cpu, char *cmd)
+{
+	if (strcmp(cmd, "g") == 0) {
+		/*  15 gprs, pc, 8 fprs, fps, cpsr.  */
+		int i;
+		char *r;
+		size_t len = 1 + 18 * sizeof(uint32_t);
+		r = malloc(len);
+		if (r == NULL) {
+			fprintf(stderr, "out of memory\n");
+			exit(1);
+		}
+		r[0] = '\0';
+		for (i=0; i<15; i++)
+			add_response_word(cpu, r, cpu->cd.arm.r[i], len);
+		add_response_word(cpu, r, cpu->pc, len);
+		/*  TODO: fprs:  */
+		for (i=0; i<8; i++)
+			add_response_word(cpu, r, 0, len);
+		/*  TODO: fps  */
+		add_response_word(cpu, r, 0, len);
+		add_response_word(cpu, r, cpu->cd.arm.cpsr, len);
+		return r;
+	}
+
+	if (cmd[0] == 'p') {
+		int regnr = strtol(cmd + 1, NULL, 16);
+		size_t len = 2 * sizeof(uint32_t) + 1;
+		char *r = malloc(len);
+		r[0] = '\0';
+		if (regnr == ARM_PC) {
+			add_response_word(cpu, r, cpu->pc, len);
+		} else if (regnr >= 0 && regnr < ARM_PC) {
+			add_response_word(cpu, r, cpu->cd.arm.r[regnr], len);
+		} else if (regnr >= 0x10 && regnr <= 0x17) {
+			/*  TODO: fprs  */
+			add_response_word(cpu, r, 0, len);
+			add_response_word(cpu, r, 0, len);
+			add_response_word(cpu, r, 0, len);
+		} else if (regnr == 0x18) {
+			/*  TODO: fps  */
+			add_response_word(cpu, r, 0, len);
+		} else if (regnr == 0x19) {
+			add_response_word(cpu, r, cpu->cd.arm.cpsr, len);
+		}
+		return r;
+	}
+
+	fatal("arm_cpu_gdb_stub(): TODO\n");
+	return NULL;
+}
+
+
+/*
  *  arm_cpu_interrupt():
  *
  *  0..31 are used as footbridge interrupt numbers, 32..47 = ISA,
@@ -771,7 +857,7 @@
  *  cpu->pc for relative addresses.
  */                     
 int arm_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib,
-        int running, uint64_t dumpaddr, int bintrans)
+        int running, uint64_t dumpaddr)
 {
 	uint32_t iw, tmp;
 	int main_opcode, secondary_opcode, s_bit, r16, r12, r8;