/[gxemul]/trunk/src/cpus/cpu_alpha_palcode.c
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Annotation of /trunk/src/cpus/cpu_alpha_palcode.c

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Revision 42 - (hide annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 9938 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============
1 dpavlin 14 /*
2 dpavlin 34 * Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3 dpavlin 14 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 42 * $Id: cpu_alpha_palcode.c,v 1.18 2007/06/15 00:41:21 debug Exp $
29 dpavlin 14 *
30     * Alpha PALcode-related functionality.
31 dpavlin 32 *
32     * (See http://www.alphalinux.org/docs/alphaahb.html for good descriptions
33     * of many PALcode functions.)
34 dpavlin 14 */
35    
36    
37     #include <stdio.h>
38     #include <stdlib.h>
39     #include <string.h>
40     #include <ctype.h>
41    
42     #include "console.h"
43     #include "cpu.h"
44     #include "machine.h"
45     #include "memory.h"
46 dpavlin 42 #include "misc.h"
47 dpavlin 14 #include "symbol.h"
48 dpavlin 42 #include "useremul.h"
49 dpavlin 14
50 dpavlin 42 #include "alpha_prom.h"
51 dpavlin 14
52 dpavlin 42
53 dpavlin 14 /*
54     * alpha_palcode_name():
55     *
56     * Return the name of a PALcode number, as a string.
57     */
58     void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen)
59     {
60     switch (palcode) {
61     case 0x10: snprintf(buf, buflen, "PAL_OSF1_rdmces"); break;
62     case 0x11: snprintf(buf, buflen, "PAL_OSF1_wrmces"); break;
63     case 0x2b: snprintf(buf, buflen, "PAL_OSF1_wrfen"); break;
64     case 0x2d: snprintf(buf, buflen, "PAL_OSF1_wrvptptr"); break;
65     case 0x30: snprintf(buf, buflen, "PAL_OSF1_swpctx"); break;
66     case 0x31: snprintf(buf, buflen, "PAL_OSF1_wrval"); break;
67     case 0x32: snprintf(buf, buflen, "PAL_OSF1_rdval"); break;
68     case 0x33: snprintf(buf, buflen, "PAL_OSF1_tbi"); break;
69     case 0x34: snprintf(buf, buflen, "PAL_OSF1_wrent"); break;
70     case 0x35: snprintf(buf, buflen, "PAL_OSF1_swpipl"); break;
71     case 0x36: snprintf(buf, buflen, "PAL_OSF1_rdps"); break;
72     case 0x37: snprintf(buf, buflen, "PAL_OSF1_wrkgp"); break;
73     case 0x38: snprintf(buf, buflen, "PAL_OSF1_wrusp"); break;
74     case 0x39: snprintf(buf, buflen, "PAL_OSF1_wrperfmon"); break;
75     case 0x3a: snprintf(buf, buflen, "PAL_OSF1_rdusp"); break;
76     case 0x3c: snprintf(buf, buflen, "PAL_OSF1_whami"); break;
77     case 0x3d: snprintf(buf, buflen, "PAL_OSF1_retsys"); break;
78     case 0x3f: snprintf(buf, buflen, "PAL_OSF1_rti"); break;
79 dpavlin 22 case 0x81: snprintf(buf, buflen, "PAL_bugchk"); break;
80 dpavlin 14 case 0x83: snprintf(buf, buflen, "PAL_OSF1_callsys"); break;
81     case 0x86: snprintf(buf, buflen, "PAL_OSF1_imb"); break;
82     case 0x92: snprintf(buf, buflen, "PAL_OSF1_urti"); break;
83     case 0x3fffffe: snprintf(buf, buflen, "GXemul_PROM"); break;
84 dpavlin 32 default:snprintf(buf, buflen, "UNKNOWN 0x%"PRIx32, palcode);
85 dpavlin 14 }
86     }
87    
88    
89     /*
90     * alpha_prom_call():
91     */
92     void alpha_prom_call(struct cpu *cpu)
93     {
94 dpavlin 32 uint64_t addr, a1 = cpu->cd.alpha.r[ALPHA_A1];
95     uint64_t a2 = cpu->cd.alpha.r[ALPHA_A2], a3 = cpu->cd.alpha.r[ALPHA_A3];
96     uint64_t len;
97     char *s = "";
98 dpavlin 14
99     switch (cpu->cd.alpha.r[ALPHA_A0]) {
100 dpavlin 32
101     case PROM_R_PUTS:
102     /* a1 = channel, a2 = ptr to buf, a3 = len */
103     for (addr = a2; addr < a2 + a3; addr ++) {
104 dpavlin 14 unsigned char ch;
105     cpu->memory_rw(cpu, cpu->mem, addr, &ch, sizeof(ch),
106     MEM_READ, CACHE_DATA | NO_EXCEPTIONS);
107     console_putchar(cpu->machine->main_console_handle, ch);
108     }
109 dpavlin 32 cpu->cd.alpha.r[ALPHA_V0] = a3;
110 dpavlin 14 break;
111 dpavlin 32
112     case PROM_R_GETENV:
113     /* a1 = variable id, a2 = char *buf, a3 = bufsize */
114     switch (a1) {
115     case PROM_E_BOOTED_DEV:
116     s = ""; /* TODO */
117     break;
118     case PROM_E_BOOTED_FILE:
119     s = cpu->machine->boot_kernel_filename;
120     break;
121     case PROM_E_BOOTED_OSFLAGS:
122     s = cpu->machine->boot_string_argument;
123     break;
124     case PROM_E_TTY_DEV:
125     s = ""; /* TODO */
126     break;
127     default:fatal("[ Alpha PALcode: GXemul PROM getenv %i: TODO "
128     "]\n", cpu->cd.alpha.r[ALPHA_A1]);
129     cpu->running = 0;
130     }
131     /* Copy at most a3 bytes. */
132     len = a3;
133     if (strlen(s) < len)
134     len = strlen(s) + 1;
135     store_buf(cpu, a2, s, len);
136 dpavlin 14 break;
137 dpavlin 32
138 dpavlin 24 default:fatal("[ Alpha PALcode: GXemul PROM call, a0=0x%"PRIx64" ]\n",
139     (uint64_t) cpu->cd.alpha.r[ALPHA_A0]);
140 dpavlin 14 cpu->running = 0;
141     }
142    
143     /* Return from the PROM call. */
144     cpu->pc = cpu->cd.alpha.r[ALPHA_RA];
145     }
146    
147    
148     /*
149     * alpha_palcode():
150     *
151     * Execute an Alpha PALcode instruction. (Most of these correspond to
152 dpavlin 22 * OSF1 palcodes, used by for example NetBSD/alpha.)
153 dpavlin 14 */
154     void alpha_palcode(struct cpu *cpu, uint32_t palcode)
155     {
156 dpavlin 32 uint64_t a0 = cpu->cd.alpha.r[ALPHA_A0], a1 = cpu->cd.alpha.r[ALPHA_A1];
157    
158 dpavlin 14 switch (palcode) {
159 dpavlin 32 case 0x02: /* PAL_draina */
160     /* TODO? */
161     break;
162 dpavlin 14 case 0x10: /* PAL_OSF1_rdmces */
163 dpavlin 32 /* TODO. Return Machine Check status in v0. */
164     cpu->cd.alpha.r[ALPHA_V0] = 0;
165 dpavlin 14 break;
166     case 0x11: /* PAL_OSF1_wrmces */
167 dpavlin 32 /* TODO. Clear Machine Check and Error status. */
168 dpavlin 14 break;
169     case 0x2b: /* PAL_OSF1_wrfen */
170     /* Floating point enable: a0 = 1 or 0. */
171     /* TODO */
172     break;
173 dpavlin 24 case 0x2d: /* PAL_OSF1_wrvptptr */
174 dpavlin 32 /* Write Virtual Page Table Pointer. a0 = value */
175     cpu->cd.alpha.vptptr = a0;
176 dpavlin 24 break;
177     case 0x30: /* PAL_OSF1_swpctx */
178 dpavlin 32 /* Save old context: */
179     store_64bit_word(cpu, cpu->cd.alpha.ctx + 0,
180     cpu->cd.alpha.pcb.apcb_ksp);
181     store_64bit_word(cpu, cpu->cd.alpha.ctx + 8,
182     cpu->cd.alpha.pcb.apcb_usp);
183     store_64bit_word(cpu, cpu->cd.alpha.ctx + 16,
184     cpu->cd.alpha.pcb.apcb_ptbr);
185     store_32bit_word(cpu, cpu->cd.alpha.ctx + 24,
186     cpu->cd.alpha.pcb.apcb_cpc);
187     store_32bit_word(cpu, cpu->cd.alpha.ctx + 28,
188     cpu->cd.alpha.pcb.apcb_asn);
189     store_64bit_word(cpu, cpu->cd.alpha.ctx + 32,
190     cpu->cd.alpha.pcb.apcb_unique);
191     store_64bit_word(cpu, cpu->cd.alpha.ctx + 40,
192     cpu->cd.alpha.pcb.apcb_flags);
193     store_64bit_word(cpu, cpu->cd.alpha.ctx + 48,
194     cpu->cd.alpha.pcb.apcb_decrsv0);
195     store_64bit_word(cpu, cpu->cd.alpha.ctx + 56,
196     cpu->cd.alpha.pcb.apcb_decrsv1);
197     /* Load new context: */
198     cpu->cd.alpha.ctx = a0;
199     cpu->cd.alpha.pcb.apcb_ksp =
200     load_64bit_word(cpu, cpu->cd.alpha.ctx + 0);
201     cpu->cd.alpha.pcb.apcb_usp =
202     load_64bit_word(cpu, cpu->cd.alpha.ctx + 8);
203     cpu->cd.alpha.pcb.apcb_ptbr =
204     load_64bit_word(cpu, cpu->cd.alpha.ctx + 16);
205     cpu->cd.alpha.pcb.apcb_cpc =
206     load_64bit_word(cpu, cpu->cd.alpha.ctx + 24);
207     cpu->cd.alpha.pcb.apcb_asn =
208     load_64bit_word(cpu, cpu->cd.alpha.ctx + 28);
209     cpu->cd.alpha.pcb.apcb_unique =
210     load_64bit_word(cpu, cpu->cd.alpha.ctx + 32);
211     cpu->cd.alpha.pcb.apcb_flags =
212     load_64bit_word(cpu, cpu->cd.alpha.ctx + 40);
213     cpu->cd.alpha.pcb.apcb_decrsv0 =
214     load_64bit_word(cpu, cpu->cd.alpha.ctx + 48);
215     cpu->cd.alpha.pcb.apcb_decrsv1 =
216     load_64bit_word(cpu, cpu->cd.alpha.ctx + 56);
217 dpavlin 24 break;
218 dpavlin 22 case 0x31: /* PAL_OSF1_wrval */
219     /* a0 = value */
220 dpavlin 32 cpu->cd.alpha.sysvalue = a0;
221 dpavlin 22 break;
222     case 0x32: /* PAL_OSF1_rdval */
223     /* return: v0 = value */
224     cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.sysvalue;
225     break;
226 dpavlin 14 case 0x33: /* PAL_OSF1_tbi */
227 dpavlin 32 /*
228     * a0 = op, a1 = vaddr
229     */
230     fatal("[ Alpha PALcode: PAL_OSF1_tbi: a0=%"PRIi64" a1=0x%"
231     PRIx64" ]\n", (int64_t)a0, (uint64_t)a1);
232     cpu->invalidate_translation_caches(cpu, a1, INVALIDATE_VADDR);
233 dpavlin 14 break;
234     case 0x34: /* PAL_OSF1_wrent (Write System Entry Address) */
235     /* a0 = new vector, a1 = vector selector */
236 dpavlin 32 if (a1 < N_ALPHA_KENTRY)
237     cpu->cd.alpha.kentry[a1] = a0;
238     else {
239     fatal("[ Alpha PALcode: PAL_OSF1_wrent: attempt to "
240     "write to non-implemented selector %i ]\n",
241     (int)a1);
242     cpu->running = 0;
243     }
244 dpavlin 14 break;
245     case 0x35: /* PAL_OSF1_swpipl */
246     /* a0 = new ipl, v0 = return old ipl */
247     cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.ipl;
248 dpavlin 32 cpu->cd.alpha.ipl = a0;
249 dpavlin 14 break;
250     case 0x36: /* PAL_OSF1_rdps */
251     /* TODO */
252     cpu->cd.alpha.r[ALPHA_V0] = 0;
253     break;
254     case 0x37: /* PAL_OSF1_wrkgp */
255     /* "clobbers a0, t0, t8-t11" according to comments in
256     NetBSD sources */
257 dpavlin 32 cpu->cd.alpha.kgp = a0;
258 dpavlin 14 break;
259 dpavlin 32 case 0x38: /* PAL_OSF1_wrusp */
260     /* a0 = value */
261     cpu->cd.alpha.pcb.apcb_usp = a0;
262     break;
263     case 0x3a: /* PAL_OSF1_rdusp */
264     /* return: v0 = value */
265     cpu->cd.alpha.r[ALPHA_V0] = cpu->cd.alpha.pcb.apcb_usp;
266     break;
267 dpavlin 14 case 0x3c: /* PAL_OSF1_whami */
268     /* Returns CPU id in v0: */
269     cpu->cd.alpha.r[ALPHA_V0] = cpu->cpu_id;
270     break;
271 dpavlin 22 case 0x81: /* PAL_bugchk */
272     cpu->running = 0;
273     break;
274 dpavlin 14 case 0x83: /* PAL_OSF1_syscall */
275     if (cpu->machine->userland_emul != NULL)
276     useremul_syscall(cpu, 0);
277     else {
278     fatal("[ Alpha PALcode: syscall, but no"
279     " syscall handler? ]\n");
280     cpu->running = 0;
281     }
282     break;
283     case 0x86: /* PAL_OSF1_imb */
284     /* TODO */
285     break;
286 dpavlin 32 case 0x3fffffc:
287     fatal("[ Alpha: KENTRY not set! Halting. ]");
288     cpu->running = 0;
289     break;
290 dpavlin 24 case 0x3fffffd:
291     fatal("[ Alpha PALcode: Fixup: TODO ]\n");
292     /* Return from the fixup call. */
293     cpu->cd.alpha.r[ALPHA_V0] = 0; /* Success? */
294     cpu->pc = cpu->cd.alpha.r[ALPHA_RA];
295     break;
296 dpavlin 14 case 0x3fffffe:
297     alpha_prom_call(cpu);
298     break;
299     default:fatal("[ Alpha PALcode 0x%x unimplemented! ]\n", palcode);
300     cpu->running = 0;
301     }
302     }
303    
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