/[gxemul]/trunk/src/cpus/cpu_alpha_instr.c
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Diff of /trunk/src/cpus/cpu_alpha_instr.c

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revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: cpu_alpha_instr.c,v 1.7 2006/02/09 22:40:27 debug Exp $   *  $Id: cpu_alpha_instr.c,v 1.14 2006/08/21 17:02:36 debug Exp $
29   *   *
30   *  Alpha instructions.   *  Alpha instructions.
31   *   *
# Line 65  X(call_pal) Line 65  X(call_pal)
65          alpha_palcode(cpu, ic->arg[0]);          alpha_palcode(cpu, ic->arg[0]);
66    
67          if (!cpu->running) {          if (!cpu->running) {
                 cpu->running_translated = 0;  
68                  cpu->n_translated_instrs --;                  cpu->n_translated_instrs --;
69                  cpu->cd.alpha.next_ic = &nothing_call;                  cpu->cd.alpha.next_ic = &nothing_call;
70          } else if (cpu->pc != old_pc) {          } else if (cpu->pc != old_pc) {
# Line 598  X(cmptle) Line 597  X(cmptle)
597    
598    
599  /*  /*
600     *  implver:  Return CPU implver value.
601     *
602     *  arg[0] = pointer to destination uint64_t
603     */
604    X(implver)
605    {
606            reg(ic->arg[0]) = cpu->cd.alpha.cpu_type.implver;
607    }
608    
609    
610    /*
611   *  mull:  Signed Multiply 32x32 => 32.   *  mull:  Signed Multiply 32x32 => 32.
612   *   *
613   *  arg[0] = pointer to destination uint64_t   *  arg[0] = pointer to destination uint64_t
# Line 749  X(to_be_translated) Line 759  X(to_be_translated)
759  {  {
760          uint64_t addr, low_pc;          uint64_t addr, low_pc;
761          uint32_t iword;          uint32_t iword;
         struct alpha_vph_page *vph_p;  
762          unsigned char *page;          unsigned char *page;
763          unsigned char ib[4];          unsigned char ib[4];
764          void (*samepage_function)(struct cpu *, struct alpha_instr_call *);          void (*samepage_function)(struct cpu *, struct alpha_instr_call *);
765          int opcode, ra, rb, func, rc, imm, load, loadstore_type, fp, llsc;          int opcode, ra, rb, func, rc, imm, load, loadstore_type, fp, llsc;
 #ifdef DYNTRANS_BACKEND  
         int simple = 0;  
 #endif  
766    
767          /*  Figure out the (virtual) address of the instruction:  */          /*  Figure out the (virtual) address of the instruction:  */
768          low_pc = ((size_t)ic - (size_t)cpu->cd.alpha.cur_ic_page)          low_pc = ((size_t)ic - (size_t)cpu->cd.alpha.cur_ic_page)
# Line 768  X(to_be_translated) Line 774  X(to_be_translated)
774          cpu->pc = addr;          cpu->pc = addr;
775    
776          /*  Read the instruction word from memory:  */          /*  Read the instruction word from memory:  */
777          if ((addr >> ALPHA_TOPSHIFT) == 0) {          {
778                  vph_p = cpu->cd.alpha.vph_table0[(addr >>                  const uint32_t mask1 = (1 << DYNTRANS_L1N) - 1;
779                      ALPHA_LEVEL0_SHIFT) & 8191];                  const uint32_t mask2 = (1 << DYNTRANS_L2N) - 1;
780                  page = vph_p->host_load[(addr >> ALPHA_LEVEL1_SHIFT) & 8191];                  const uint32_t mask3 = (1 << DYNTRANS_L3N) - 1;
781          } else if ((addr >> ALPHA_TOPSHIFT) == ALPHA_TOP_KERNEL) {                  uint32_t x1 = (addr >> (64-DYNTRANS_L1N)) & mask1;
782                  vph_p = cpu->cd.alpha.vph_table0_kernel[(addr >>                  uint32_t x2 = (addr >> (64-DYNTRANS_L1N-DYNTRANS_L2N)) & mask2;
783                      ALPHA_LEVEL0_SHIFT) & 8191];                  uint32_t x3 = (addr >> (64-DYNTRANS_L1N-DYNTRANS_L2N-
784                  page = vph_p->host_load[(addr >> ALPHA_LEVEL1_SHIFT) & 8191];                      DYNTRANS_L3N)) & mask3;
785          } else                  struct DYNTRANS_L2_64_TABLE *l2 = cpu->cd.alpha.l1_64[x1];
786                  page = NULL;                  struct DYNTRANS_L3_64_TABLE *l3 = l2->l3[x2];
787                    page = l3->host_load[x3];
788            }
789    
790          if (page != NULL) {          if (page != NULL) {
791                  /*  fatal("TRANSLATION HIT!\n");  */                  /*  fatal("TRANSLATION HIT!\n");  */
# Line 791  X(to_be_translated) Line 799  X(to_be_translated)
799                  }                  }
800          }          }
801    
802  #ifdef HOST_LITTLE_ENDIAN          /*  Alpha instruction words are always little-endian. Convert
803          iword = *((uint32_t *)&ib[0]);              to host order:  */
804  #else          iword = LE32_TO_HOST( *((uint32_t *)&ib[0]) );
         iword = ib[0] + (ib[1]<<8) + (ib[2]<<16) + (ib[3]<<24);  
 #endif  
   
         /*  fatal("{ Alpha: translating pc=0x%016llx iword=0x%08x }\n",  
             (long long)addr, (int)iword);  */  
805    
806    
807  #define DYNTRANS_TO_BE_TRANSLATED_HEAD  #define DYNTRANS_TO_BE_TRANSLATED_HEAD
# Line 886  X(to_be_translated) Line 889  X(to_be_translated)
889                  }                  }
890                  ic->f = alpha_loadstore[                  ic->f = alpha_loadstore[
891                      loadstore_type + (imm==0? 4 : 0) + 8 * load                      loadstore_type + (imm==0? 4 : 0) + 8 * load
892                      + (cpu->machine->dyntrans_alignment_check? 16:0)                      + 16 * llsc];
                     + 32 * llsc];  
893                  /*  Load to the zero register is treated as a prefetch                  /*  Load to the zero register is treated as a prefetch
894                      hint. It is ignored here.  */                      hint. It is ignored here.  */
895                  if (load && ra == ALPHA_ZERO) {                  if (load && ra == ALPHA_ZERO) {
# Line 917  X(to_be_translated) Line 919  X(to_be_translated)
919                  case 0x02: ic->f = instr(s4addl); break;                  case 0x02: ic->f = instr(s4addl); break;
920                  case 0x09: ic->f = instr(subl); break;                  case 0x09: ic->f = instr(subl); break;
921                  case 0x0b: ic->f = instr(s4subl); break;                  case 0x0b: ic->f = instr(s4subl); break;
922                    case 0x0f: ic->f = instr(cmpbge); break;
923                  case 0x12: ic->f = instr(s8addl); break;                  case 0x12: ic->f = instr(s8addl); break;
924                  case 0x1b: ic->f = instr(s8subl); break;                  case 0x1b: ic->f = instr(s8subl); break;
925                  case 0x1d: ic->f = instr(cmpult); break;                  case 0x1d: ic->f = instr(cmpult); break;
# Line 935  X(to_be_translated) Line 938  X(to_be_translated)
938                  case 0x82: ic->f = instr(s4addl_imm); break;                  case 0x82: ic->f = instr(s4addl_imm); break;
939                  case 0x89: ic->f = instr(subl_imm); break;                  case 0x89: ic->f = instr(subl_imm); break;
940                  case 0x8b: ic->f = instr(s4subl_imm); break;                  case 0x8b: ic->f = instr(s4subl_imm); break;
941                    case 0x8f: ic->f = instr(cmpbge_imm); break;
942                  case 0x92: ic->f = instr(s8addl_imm); break;                  case 0x92: ic->f = instr(s8addl_imm); break;
943                  case 0x9b: ic->f = instr(s8subl_imm); break;                  case 0x9b: ic->f = instr(s8subl_imm); break;
944                  case 0x9d: ic->f = instr(cmpult_imm); break;                  case 0x9d: ic->f = instr(cmpult_imm); break;
# Line 1000  X(to_be_translated) Line 1004  X(to_be_translated)
1004                  case 0xc8: ic->f = instr(xornot_imm); break;                  case 0xc8: ic->f = instr(xornot_imm); break;
1005                  case 0xe4: ic->f = instr(cmovle_imm); break;                  case 0xe4: ic->f = instr(cmovle_imm); break;
1006                  case 0xe6: ic->f = instr(cmovgt_imm); break;                  case 0xe6: ic->f = instr(cmovgt_imm); break;
1007                    case 0xec: ic->f = instr(implver); break;
1008                  default:fatal("[ Alpha: unimplemented function 0x%03x for"                  default:fatal("[ Alpha: unimplemented function 0x%03x for"
1009                              " opcode 0x%02x ]\n", func, opcode);                              " opcode 0x%02x ]\n", func, opcode);
1010                          goto bad;                          goto bad;
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