--- trunk/src/cpus/cpu_alpha.c 2007/10/08 16:19:23 20 +++ trunk/src/cpus/cpu_alpha.c 2007/10/08 16:21:53 38 @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005 Anders Gavare. All rights reserved. + * Copyright (C) 2005-2007 Anders Gavare. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_alpha.c,v 1.3 2005/11/13 00:14:07 debug Exp $ + * $Id: cpu_alpha.c,v 1.25 2007/03/26 02:01:35 debug Exp $ * * Alpha CPU emulation. * @@ -44,6 +44,7 @@ #include "machine.h" #include "memory.h" #include "misc.h" +#include "settings.h" #include "symbol.h" #define DYNTRANS_8K @@ -64,37 +65,54 @@ int alpha_cpu_new(struct cpu *cpu, struct memory *mem, struct machine *machine, int cpu_id, char *cpu_type_name) { - int i; + int i = 0; + struct alpha_cpu_type_def cpu_type_defs[] = ALPHA_CPU_TYPE_DEFS; - if (strcasecmp(cpu_type_name, "Alpha") != 0) + /* Scan the cpu_type_defs list for this cpu type: */ + while (cpu_type_defs[i].name != NULL) { + if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) { + break; + } + i++; + } + if (cpu_type_defs[i].name == NULL) return 0; + cpu->is_32bit = 0; + cpu->byte_order = EMUL_LITTLE_ENDIAN; + cpu->memory_rw = alpha_memory_rw; + cpu->run_instr = alpha_run_instr; + cpu->translate_v2p = alpha_translate_v2p; cpu->update_translation_table = alpha_update_translation_table; cpu->invalidate_translation_caches = alpha_invalidate_translation_caches; cpu->invalidate_code_translation = alpha_invalidate_code_translation; - cpu->is_32bit = 0; + + cpu->cd.alpha.cpu_type = cpu_type_defs[i]; /* Only show name and caches etc for CPU nr 0: */ if (cpu_id == 0) { debug("%s", cpu->name); } - /* Create the default virtual->physical->host translation: */ - cpu->cd.alpha.vph_default_page = malloc(sizeof(struct alpha_vph_page)); - if (cpu->cd.alpha.vph_default_page == NULL) { - fprintf(stderr, "out of memory in alpha_cpu_new()\n"); - exit(1); - } - memset(cpu->cd.alpha.vph_default_page, 0, - sizeof(struct alpha_vph_page)); - for (i=0; icd.alpha.vph_table0[i] = cpu->cd.alpha.vph_table0_kernel[i] - = cpu->cd.alpha.vph_default_page; - cpu->cd.alpha.r[ALPHA_SP] = 0xfffffc000000ff00ULL; + /* Set up dummy kentry pointers to something which crashes + the machine: */ + store_32bit_word(cpu, 0x10010, 0x3fffffc); + for (i=0; icd.alpha.kentry[i] = 0x10010; + + /* Bogus initial context (will be overwritten on first + context switch): */ + cpu->cd.alpha.ctx = 0x10100; + + CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); + for (i=0; icd.alpha.r[i]); + return 1; } @@ -116,41 +134,17 @@ */ void alpha_cpu_list_available_types(void) { - /* TODO */ - - debug("Alpha\n"); -} - - -/* - * alpha_cpu_register_match(): - */ -void alpha_cpu_register_match(struct machine *m, char *name, - int writeflag, uint64_t *valuep, int *match_register) -{ - int i, cpunr = 0; + int i, j; + struct alpha_cpu_type_def tdefs[] = ALPHA_CPU_TYPE_DEFS; - /* CPU number: */ - - /* TODO */ - - if (strcasecmp(name, "pc") == 0) { - if (writeflag) { - m->cpus[cpunr]->pc = *valuep; - } else - *valuep = m->cpus[cpunr]->pc; - *match_register = 1; - } - - /* Register names: */ - for (i=0; icpus[cpunr]->cd.alpha.r[i] = *valuep; - else - *valuep = m->cpus[cpunr]->cd.alpha.r[i]; - *match_register = 1; - } + i = 0; + while (tdefs[i].name != NULL) { + debug("%s", tdefs[i].name); + for (j=13 - strlen(tdefs[i].name); j>0; j--) + debug(" "); + i++; + if ((i % 4) == 0 || tdefs[i].name == NULL) + debug("\n"); } } @@ -172,15 +166,15 @@ if (gprs) { symbol = get_symbol_name(&cpu->machine->symbol_context, cpu->pc, &offset); - debug("cpu%i:\t pc = 0x%016llx", x, (long long)cpu->pc); + debug("cpu%i:\t pc = 0x%016"PRIx64, x, (uint64_t) cpu->pc); debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); for (i=0; i> 1) + ((i & 1) << 4); if ((i % 2) == 0) debug("cpu%i:\t", x); if (r != ALPHA_ZERO) - debug("%3s = 0x%016llx", alpha_regname[r], - (long long)cpu->cd.alpha.r[r]); + debug("%3s = 0x%016"PRIx64, alpha_regname[r], + (uint64_t) cpu->cd.alpha.r[r]); debug((i % 2) == 1? "\n" : " "); } } @@ -188,22 +182,16 @@ /* - * alpha_cpu_interrupt(): - */ -int alpha_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) -{ - fatal("alpha_cpu_interrupt(): TODO\n"); - return 0; -} - - -/* - * alpha_cpu_interrupt_ack(): + * alpha_cpu_tlbdump(): + * + * Called from the debugger to dump the TLB in a readable format. + * x is the cpu number to dump, or -1 to dump all CPUs. + * + * If rawflag is nonzero, then the TLB contents isn't formated nicely, + * just dumped. */ -int alpha_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) +void alpha_cpu_tlbdump(struct machine *m, int x, int rawflag) { - /* fatal("alpha_cpu_interrupt_ack(): TODO\n"); */ - return 0; } @@ -242,7 +230,7 @@ * cpu->pc for relative addresses. */ int alpha_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, - int running, uint64_t dumpaddr, int bintrans) + int running, uint64_t dumpaddr) { uint32_t iw; uint64_t offset, tmp; @@ -261,7 +249,7 @@ if (cpu->machine->ncpus > 1 && running) debug("cpu%i:\t", cpu->cpu_id); - debug("%016llx: ", (long long)dumpaddr); + debug("%016"PRIx64": ", (uint64_t) dumpaddr); iw = ib[0] + (ib[1]<<8) + (ib[2]<<16) + (ib[3]<<24); debug("%08x\t", (int)iw); @@ -398,6 +386,7 @@ case 0x061: mnem = "amask"; break; case 0x064: mnem = "cmovle"; break; case 0x066: mnem = "cmovgt"; break; + case 0x06c: mnem = "implver"; break; default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", opcode, func); } @@ -416,6 +405,9 @@ else debug("mov\t%s,%s\n", alpha_regname[ra], alpha_regname[rc]); + } else if (func == 0x1ec) { + /* implver */ + debug("%s\t%s\n", mnem, alpha_regname[rc]); } else if (func & 0x80) debug("%s\t%s,0x%x,%s\n", mnem, alpha_regname[ra], (rb << 3) + (func >> 8), @@ -487,14 +479,18 @@ break; case 0x16: switch (func & 0x7ff) { + case 0x02f: mnem = "cvttq/c"; rbrc = 1; break; case 0x080: mnem = "adds"; break; case 0x081: mnem = "subs"; break; case 0x082: mnem = "muls"; break; - case 0x083: mnem = "mult"; break; + case 0x083: mnem = "XXXx083"; break; case 0x0a0: mnem = "addt"; break; case 0x0a1: mnem = "subt"; break; case 0x0a2: mnem = "mult"; break; case 0x0a3: mnem = "divt"; break; + case 0x0a5: mnem = "cmpteq"; break; + case 0x0a6: mnem = "cmptlt"; break; + case 0x0a7: mnem = "cmptle"; break; case 0x0be: mnem = "cvtqt"; rbrc = 1; break; default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", opcode, func); @@ -509,6 +505,7 @@ case 0x17: switch (func & 0x7ff) { case 0x020: mnem = "fabs"; rbrc = 1; break; + case 0x021: mnem = "fneg"; rbrc = 1; break; default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", opcode, func); } @@ -563,7 +560,7 @@ debug("jsr"); debug("\t%s,", alpha_regname[ra]); debug("(%s),", alpha_regname[rb]); - debug("0x%llx", (long long)tmp); + debug("0x%"PRIx64, (uint64_t) tmp); symbol = get_symbol_name(&cpu->machine->symbol_context, tmp, &offset); if (symbol != NULL) @@ -585,13 +582,15 @@ debug("%s\t", opcode==0x30? "br" : "bsr"); if (ra != ALPHA_ZERO) debug("%s,", alpha_regname[ra]); - debug("0x%llx", (long long)tmp); + debug("0x%"PRIx64, (uint64_t) tmp); symbol = get_symbol_name(&cpu->machine->symbol_context, tmp, &offset); if (symbol != NULL) debug("\t<%s>", symbol); debug("\n"); break; + case 0x31: + case 0x35: case 0x38: case 0x39: case 0x3a: @@ -600,7 +599,10 @@ case 0x3d: case 0x3e: case 0x3f: + floating = 0; switch (opcode) { + case 0x31: mnem = "fbeq"; floating = 1; break; + case 0x35: mnem = "fbne"; floating = 1; break; case 0x38: mnem = "blbc"; break; case 0x39: mnem = "beq"; break; case 0x3a: mnem = "blt"; break; @@ -615,8 +617,12 @@ tmp |= 0xffffffffffe00000ULL; tmp <<= 2; tmp += dumpaddr + sizeof(uint32_t); - debug("%s\t%s,", mnem, alpha_regname[ra]); - debug("0x%llx", (long long)tmp); + debug("%s\t", mnem); + if (floating) + debug("f%i,", ra); + else + debug("%s,", alpha_regname[ra]); + debug("0x%"PRIx64, (uint64_t) tmp); symbol = get_symbol_name(&cpu->machine->symbol_context, tmp, &offset); if (symbol != NULL)