1 |
/* |
/* |
2 |
* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
3 |
* |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_alpha.c,v 1.2 2005/10/22 17:24:20 debug Exp $ |
* $Id: cpu_alpha.c,v 1.23 2006/09/19 10:50:08 debug Exp $ |
29 |
* |
* |
30 |
* Alpha CPU emulation. |
* Alpha CPU emulation. |
31 |
* |
* |
44 |
#include "machine.h" |
#include "machine.h" |
45 |
#include "memory.h" |
#include "memory.h" |
46 |
#include "misc.h" |
#include "misc.h" |
47 |
|
#include "settings.h" |
48 |
#include "symbol.h" |
#include "symbol.h" |
49 |
|
|
50 |
#define DYNTRANS_8K |
#define DYNTRANS_8K |
65 |
int alpha_cpu_new(struct cpu *cpu, struct memory *mem, |
int alpha_cpu_new(struct cpu *cpu, struct memory *mem, |
66 |
struct machine *machine, int cpu_id, char *cpu_type_name) |
struct machine *machine, int cpu_id, char *cpu_type_name) |
67 |
{ |
{ |
68 |
int i; |
int i = 0; |
69 |
|
struct alpha_cpu_type_def cpu_type_defs[] = ALPHA_CPU_TYPE_DEFS; |
70 |
|
|
71 |
if (strcasecmp(cpu_type_name, "Alpha") != 0) |
/* Scan the cpu_type_defs list for this cpu type: */ |
72 |
|
while (cpu_type_defs[i].name != NULL) { |
73 |
|
if (strcasecmp(cpu_type_defs[i].name, cpu_type_name) == 0) { |
74 |
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break; |
75 |
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} |
76 |
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i++; |
77 |
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} |
78 |
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if (cpu_type_defs[i].name == NULL) |
79 |
return 0; |
return 0; |
80 |
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|
81 |
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cpu->is_32bit = 0; |
82 |
|
cpu->byte_order = EMUL_LITTLE_ENDIAN; |
83 |
|
|
84 |
cpu->memory_rw = alpha_memory_rw; |
cpu->memory_rw = alpha_memory_rw; |
85 |
|
cpu->run_instr = alpha_run_instr; |
86 |
|
cpu->translate_v2p = alpha_translate_v2p; |
87 |
cpu->update_translation_table = alpha_update_translation_table; |
cpu->update_translation_table = alpha_update_translation_table; |
88 |
cpu->invalidate_translation_caches = |
cpu->invalidate_translation_caches = |
89 |
alpha_invalidate_translation_caches; |
alpha_invalidate_translation_caches; |
90 |
cpu->invalidate_code_translation = alpha_invalidate_code_translation; |
cpu->invalidate_code_translation = alpha_invalidate_code_translation; |
91 |
cpu->is_32bit = 0; |
|
92 |
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cpu->cd.alpha.cpu_type = cpu_type_defs[i]; |
93 |
|
|
94 |
/* Only show name and caches etc for CPU nr 0: */ |
/* Only show name and caches etc for CPU nr 0: */ |
95 |
if (cpu_id == 0) { |
if (cpu_id == 0) { |
96 |
debug("%s", cpu->name); |
debug("%s", cpu->name); |
97 |
} |
} |
98 |
|
|
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/* Create the default virtual->physical->host translation: */ |
|
|
cpu->cd.alpha.vph_default_page = malloc(sizeof(struct alpha_vph_page)); |
|
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if (cpu->cd.alpha.vph_default_page == NULL) { |
|
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fprintf(stderr, "out of memory in alpha_cpu_new()\n"); |
|
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exit(1); |
|
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} |
|
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memset(cpu->cd.alpha.vph_default_page, 0, |
|
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sizeof(struct alpha_vph_page)); |
|
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for (i=0; i<ALPHA_LEVEL0; i++) |
|
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cpu->cd.alpha.vph_table0[i] = cpu->cd.alpha.vph_table0_kernel[i] |
|
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= cpu->cd.alpha.vph_default_page; |
|
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|
99 |
cpu->cd.alpha.r[ALPHA_SP] = 0xfffffc000000ff00ULL; |
cpu->cd.alpha.r[ALPHA_SP] = 0xfffffc000000ff00ULL; |
100 |
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|
101 |
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/* Set up dummy kentry pointers to something which crashes |
102 |
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the machine: */ |
103 |
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store_32bit_word(cpu, 0x10010, 0x3fffffc); |
104 |
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for (i=0; i<N_ALPHA_KENTRY; i++) |
105 |
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cpu->cd.alpha.kentry[i] = 0x10010; |
106 |
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|
107 |
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/* Bogus initial context (will be overwritten on first |
108 |
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context switch): */ |
109 |
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cpu->cd.alpha.ctx = 0x10100; |
110 |
|
|
111 |
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CPU_SETTINGS_ADD_REGISTER64("pc", cpu->pc); |
112 |
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for (i=0; i<N_ALPHA_REGS; i++) |
113 |
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CPU_SETTINGS_ADD_REGISTER64(alpha_regname[i], |
114 |
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cpu->cd.alpha.r[i]); |
115 |
|
|
116 |
return 1; |
return 1; |
117 |
} |
} |
118 |
|
|
134 |
*/ |
*/ |
135 |
void alpha_cpu_list_available_types(void) |
void alpha_cpu_list_available_types(void) |
136 |
{ |
{ |
137 |
/* TODO */ |
int i, j; |
138 |
|
struct alpha_cpu_type_def tdefs[] = ALPHA_CPU_TYPE_DEFS; |
|
debug("Alpha\n"); |
|
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} |
|
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|
|
|
|
|
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/* |
|
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* alpha_cpu_register_match(): |
|
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*/ |
|
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void alpha_cpu_register_match(struct machine *m, char *name, |
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int writeflag, uint64_t *valuep, int *match_register) |
|
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{ |
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int i, cpunr = 0; |
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|
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/* CPU number: */ |
|
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|
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/* TODO */ |
|
139 |
|
|
140 |
if (strcasecmp(name, "pc") == 0) { |
i = 0; |
141 |
if (writeflag) { |
while (tdefs[i].name != NULL) { |
142 |
m->cpus[cpunr]->pc = *valuep; |
debug("%s", tdefs[i].name); |
143 |
} else |
for (j=13 - strlen(tdefs[i].name); j>0; j--) |
144 |
*valuep = m->cpus[cpunr]->pc; |
debug(" "); |
145 |
*match_register = 1; |
i++; |
146 |
} |
if ((i % 4) == 0 || tdefs[i].name == NULL) |
147 |
|
debug("\n"); |
|
/* Register names: */ |
|
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for (i=0; i<N_ALPHA_REGS; i++) { |
|
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if (strcasecmp(name, alpha_regname[i]) == 0) { |
|
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if (writeflag) |
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m->cpus[cpunr]->cd.alpha.r[i] = *valuep; |
|
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else |
|
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*valuep = m->cpus[cpunr]->cd.alpha.r[i]; |
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*match_register = 1; |
|
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} |
|
148 |
} |
} |
149 |
} |
} |
150 |
|
|
166 |
if (gprs) { |
if (gprs) { |
167 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
168 |
cpu->pc, &offset); |
cpu->pc, &offset); |
169 |
debug("cpu%i:\t pc = 0x%016llx", x, (long long)cpu->pc); |
debug("cpu%i:\t pc = 0x%016"PRIx64, x, (uint64_t) cpu->pc); |
170 |
debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
debug(" <%s>\n", symbol != NULL? symbol : " no symbol "); |
171 |
for (i=0; i<N_ALPHA_REGS; i++) { |
for (i=0; i<N_ALPHA_REGS; i++) { |
172 |
int r = (i >> 1) + ((i & 1) << 4); |
int r = (i >> 1) + ((i & 1) << 4); |
173 |
if ((i % 2) == 0) |
if ((i % 2) == 0) |
174 |
debug("cpu%i:\t", x); |
debug("cpu%i:\t", x); |
175 |
if (r != ALPHA_ZERO) |
if (r != ALPHA_ZERO) |
176 |
debug("%3s = 0x%016llx", alpha_regname[r], |
debug("%3s = 0x%016"PRIx64, alpha_regname[r], |
177 |
(long long)cpu->cd.alpha.r[r]); |
(uint64_t) cpu->cd.alpha.r[r]); |
178 |
debug((i % 2) == 1? "\n" : " "); |
debug((i % 2) == 1? "\n" : " "); |
179 |
} |
} |
180 |
} |
} |
182 |
|
|
183 |
|
|
184 |
/* |
/* |
|
* alpha_cpu_show_full_statistics(): |
|
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* |
|
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* Show detailed statistics on opcode usage on each cpu. |
|
|
*/ |
|
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void alpha_cpu_show_full_statistics(struct machine *m) |
|
|
{ |
|
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fatal("alpha_cpu_show_full_statistics(): TODO\n"); |
|
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} |
|
|
|
|
|
|
|
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/* |
|
185 |
* alpha_cpu_tlbdump(): |
* alpha_cpu_tlbdump(): |
186 |
* |
* |
187 |
* Called from the debugger to dump the TLB in a readable format. |
* Called from the debugger to dump the TLB in a readable format. |
192 |
*/ |
*/ |
193 |
void alpha_cpu_tlbdump(struct machine *m, int x, int rawflag) |
void alpha_cpu_tlbdump(struct machine *m, int x, int rawflag) |
194 |
{ |
{ |
195 |
fatal("alpha_cpu_tlbdump(): TODO\n"); |
} |
196 |
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|
197 |
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|
198 |
|
static void add_response_word(struct cpu *cpu, char *r, uint64_t value, |
199 |
|
size_t maxlen, int len) |
200 |
|
{ |
201 |
|
char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64; |
202 |
|
if (len == 4) |
203 |
|
value &= 0xffffffffULL; |
204 |
|
if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
205 |
|
if (len == 4) { |
206 |
|
value = ((value & 0xff) << 24) + |
207 |
|
((value & 0xff00) << 8) + |
208 |
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((value & 0xff0000) >> 8) + |
209 |
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((value & 0xff000000) >> 24); |
210 |
|
} else { |
211 |
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value = ((value & 0xff) << 56) + |
212 |
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((value & 0xff00) << 40) + |
213 |
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((value & 0xff0000) << 24) + |
214 |
|
((value & 0xff000000ULL) << 8) + |
215 |
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((value & 0xff00000000ULL) >> 8) + |
216 |
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((value & 0xff0000000000ULL) >> 24) + |
217 |
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((value & 0xff000000000000ULL) >> 40) + |
218 |
|
((value & 0xff00000000000000ULL) >> 56); |
219 |
|
} |
220 |
|
} |
221 |
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snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value); |
222 |
|
} |
223 |
|
|
224 |
|
|
225 |
|
/* |
226 |
|
* alpha_cpu_gdb_stub(): |
227 |
|
* |
228 |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
229 |
|
* on success, NULL on failure. |
230 |
|
*/ |
231 |
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char *alpha_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
232 |
|
{ |
233 |
|
if (strcmp(cmd, "g") == 0) { |
234 |
|
int i; |
235 |
|
char *r; |
236 |
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size_t wlen = cpu->is_32bit? |
237 |
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sizeof(uint32_t) : sizeof(uint64_t); |
238 |
|
size_t len = 1 + 76 * wlen; |
239 |
|
r = malloc(len); |
240 |
|
if (r == NULL) { |
241 |
|
fprintf(stderr, "out of memory\n"); |
242 |
|
exit(1); |
243 |
|
} |
244 |
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r[0] = '\0'; |
245 |
|
for (i=0; i<128; i++) |
246 |
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add_response_word(cpu, r, i, len, wlen); |
247 |
|
return r; |
248 |
|
} |
249 |
|
|
250 |
|
if (cmd[0] == 'p') { |
251 |
|
int regnr = strtol(cmd + 1, NULL, 16); |
252 |
|
size_t wlen = cpu->is_32bit? |
253 |
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sizeof(uint32_t) : sizeof(uint64_t); |
254 |
|
size_t len = 2 * wlen + 1; |
255 |
|
char *r = malloc(len); |
256 |
|
r[0] = '\0'; |
257 |
|
if (regnr >= 0 && regnr <= 31) { |
258 |
|
add_response_word(cpu, r, |
259 |
|
cpu->cd.alpha.r[regnr], len, wlen); |
260 |
|
} else if (regnr >= 32 && regnr <= 62) { |
261 |
|
add_response_word(cpu, r, |
262 |
|
cpu->cd.alpha.f[regnr - 32], len, wlen); |
263 |
|
} else if (regnr == 0x3f) { |
264 |
|
add_response_word(cpu, r, cpu->cd.alpha.fpcr, |
265 |
|
len, wlen); |
266 |
|
} else if (regnr == 0x40) { |
267 |
|
add_response_word(cpu, r, cpu->pc, len, wlen); |
268 |
|
} else { |
269 |
|
/* Unimplemented: */ |
270 |
|
add_response_word(cpu, r, 0xcc000 + regnr, len, wlen); |
271 |
|
} |
272 |
|
return r; |
273 |
|
} |
274 |
|
|
275 |
|
fatal("alpha_cpu_gdb_stub(): TODO\n"); |
276 |
|
return NULL; |
277 |
} |
} |
278 |
|
|
279 |
|
|
332 |
* cpu->pc for relative addresses. |
* cpu->pc for relative addresses. |
333 |
*/ |
*/ |
334 |
int alpha_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, |
int alpha_cpu_disassemble_instr(struct cpu *cpu, unsigned char *ib, |
335 |
int running, uint64_t dumpaddr, int bintrans) |
int running, uint64_t dumpaddr) |
336 |
{ |
{ |
337 |
uint32_t iw; |
uint32_t iw; |
338 |
uint64_t offset, tmp; |
uint64_t offset, tmp; |
351 |
if (cpu->machine->ncpus > 1 && running) |
if (cpu->machine->ncpus > 1 && running) |
352 |
debug("cpu%i:\t", cpu->cpu_id); |
debug("cpu%i:\t", cpu->cpu_id); |
353 |
|
|
354 |
debug("%016llx: ", (long long)dumpaddr); |
debug("%016"PRIx64": ", (uint64_t) dumpaddr); |
355 |
|
|
356 |
iw = ib[0] + (ib[1]<<8) + (ib[2]<<16) + (ib[3]<<24); |
iw = ib[0] + (ib[1]<<8) + (ib[2]<<16) + (ib[3]<<24); |
357 |
debug("%08x\t", (int)iw); |
debug("%08x\t", (int)iw); |
488 |
case 0x061: mnem = "amask"; break; |
case 0x061: mnem = "amask"; break; |
489 |
case 0x064: mnem = "cmovle"; break; |
case 0x064: mnem = "cmovle"; break; |
490 |
case 0x066: mnem = "cmovgt"; break; |
case 0x066: mnem = "cmovgt"; break; |
491 |
|
case 0x06c: mnem = "implver"; break; |
492 |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
493 |
opcode, func); |
opcode, func); |
494 |
} |
} |
507 |
else |
else |
508 |
debug("mov\t%s,%s\n", alpha_regname[ra], |
debug("mov\t%s,%s\n", alpha_regname[ra], |
509 |
alpha_regname[rc]); |
alpha_regname[rc]); |
510 |
|
} else if (func == 0x1ec) { |
511 |
|
/* implver */ |
512 |
|
debug("%s\t%s\n", mnem, alpha_regname[rc]); |
513 |
} else if (func & 0x80) |
} else if (func & 0x80) |
514 |
debug("%s\t%s,0x%x,%s\n", mnem, |
debug("%s\t%s,0x%x,%s\n", mnem, |
515 |
alpha_regname[ra], (rb << 3) + (func >> 8), |
alpha_regname[ra], (rb << 3) + (func >> 8), |
581 |
break; |
break; |
582 |
case 0x16: |
case 0x16: |
583 |
switch (func & 0x7ff) { |
switch (func & 0x7ff) { |
584 |
|
case 0x02f: mnem = "cvttq/c"; rbrc = 1; break; |
585 |
case 0x080: mnem = "adds"; break; |
case 0x080: mnem = "adds"; break; |
586 |
case 0x081: mnem = "subs"; break; |
case 0x081: mnem = "subs"; break; |
587 |
case 0x082: mnem = "muls"; break; |
case 0x082: mnem = "muls"; break; |
588 |
case 0x083: mnem = "mult"; break; |
case 0x083: mnem = "XXXx083"; break; |
589 |
case 0x0a0: mnem = "addt"; break; |
case 0x0a0: mnem = "addt"; break; |
590 |
case 0x0a1: mnem = "subt"; break; |
case 0x0a1: mnem = "subt"; break; |
591 |
case 0x0a2: mnem = "mult"; break; |
case 0x0a2: mnem = "mult"; break; |
592 |
case 0x0a3: mnem = "divt"; break; |
case 0x0a3: mnem = "divt"; break; |
593 |
|
case 0x0a5: mnem = "cmpteq"; break; |
594 |
|
case 0x0a6: mnem = "cmptlt"; break; |
595 |
|
case 0x0a7: mnem = "cmptle"; break; |
596 |
case 0x0be: mnem = "cvtqt"; rbrc = 1; break; |
case 0x0be: mnem = "cvtqt"; rbrc = 1; break; |
597 |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
598 |
opcode, func); |
opcode, func); |
607 |
case 0x17: |
case 0x17: |
608 |
switch (func & 0x7ff) { |
switch (func & 0x7ff) { |
609 |
case 0x020: mnem = "fabs"; rbrc = 1; break; |
case 0x020: mnem = "fabs"; rbrc = 1; break; |
610 |
|
case 0x021: mnem = "fneg"; rbrc = 1; break; |
611 |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
default:debug("UNIMPLEMENTED opcode 0x%x func 0x%x\n", |
612 |
opcode, func); |
opcode, func); |
613 |
} |
} |
662 |
debug("jsr"); |
debug("jsr"); |
663 |
debug("\t%s,", alpha_regname[ra]); |
debug("\t%s,", alpha_regname[ra]); |
664 |
debug("(%s),", alpha_regname[rb]); |
debug("(%s),", alpha_regname[rb]); |
665 |
debug("0x%llx", (long long)tmp); |
debug("0x%"PRIx64, (uint64_t) tmp); |
666 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
667 |
tmp, &offset); |
tmp, &offset); |
668 |
if (symbol != NULL) |
if (symbol != NULL) |
684 |
debug("%s\t", opcode==0x30? "br" : "bsr"); |
debug("%s\t", opcode==0x30? "br" : "bsr"); |
685 |
if (ra != ALPHA_ZERO) |
if (ra != ALPHA_ZERO) |
686 |
debug("%s,", alpha_regname[ra]); |
debug("%s,", alpha_regname[ra]); |
687 |
debug("0x%llx", (long long)tmp); |
debug("0x%"PRIx64, (uint64_t) tmp); |
688 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
689 |
tmp, &offset); |
tmp, &offset); |
690 |
if (symbol != NULL) |
if (symbol != NULL) |
691 |
debug("\t<%s>", symbol); |
debug("\t<%s>", symbol); |
692 |
debug("\n"); |
debug("\n"); |
693 |
break; |
break; |
694 |
|
case 0x31: |
695 |
|
case 0x35: |
696 |
case 0x38: |
case 0x38: |
697 |
case 0x39: |
case 0x39: |
698 |
case 0x3a: |
case 0x3a: |
701 |
case 0x3d: |
case 0x3d: |
702 |
case 0x3e: |
case 0x3e: |
703 |
case 0x3f: |
case 0x3f: |
704 |
|
floating = 0; |
705 |
switch (opcode) { |
switch (opcode) { |
706 |
|
case 0x31: mnem = "fbeq"; floating = 1; break; |
707 |
|
case 0x35: mnem = "fbne"; floating = 1; break; |
708 |
case 0x38: mnem = "blbc"; break; |
case 0x38: mnem = "blbc"; break; |
709 |
case 0x39: mnem = "beq"; break; |
case 0x39: mnem = "beq"; break; |
710 |
case 0x3a: mnem = "blt"; break; |
case 0x3a: mnem = "blt"; break; |
719 |
tmp |= 0xffffffffffe00000ULL; |
tmp |= 0xffffffffffe00000ULL; |
720 |
tmp <<= 2; |
tmp <<= 2; |
721 |
tmp += dumpaddr + sizeof(uint32_t); |
tmp += dumpaddr + sizeof(uint32_t); |
722 |
debug("%s\t%s,", mnem, alpha_regname[ra]); |
debug("%s\t", mnem); |
723 |
debug("0x%llx", (long long)tmp); |
if (floating) |
724 |
|
debug("f%i,", ra); |
725 |
|
else |
726 |
|
debug("%s,", alpha_regname[ra]); |
727 |
|
debug("0x%"PRIx64, (uint64_t) tmp); |
728 |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
symbol = get_symbol_name(&cpu->machine->symbol_context, |
729 |
tmp, &offset); |
tmp, &offset); |
730 |
if (symbol != NULL) |
if (symbol != NULL) |