25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: cpu_alpha.c,v 1.24 2006/12/30 13:30:53 debug Exp $ |
* $Id: cpu_alpha.c,v 1.29 2007/06/28 13:36:46 debug Exp $ |
29 |
* |
* |
30 |
* Alpha CPU emulation. |
* Alpha CPU emulation. |
31 |
* |
* |
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#include <ctype.h> |
#include <ctype.h> |
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43 |
#include "cpu.h" |
#include "cpu.h" |
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#include "interrupt.h" |
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#include "machine.h" |
#include "machine.h" |
46 |
#include "memory.h" |
#include "memory.h" |
47 |
#include "misc.h" |
#include "misc.h" |
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/* Alpha symbolic register names: */ |
/* Alpha symbolic register names: */ |
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static char *alpha_regname[N_ALPHA_REGS] = ALPHA_REG_NAMES; |
static char *alpha_regname[N_ALPHA_REGS] = ALPHA_REG_NAMES; |
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void alpha_irq_interrupt_assert(struct interrupt *interrupt); |
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void alpha_irq_interrupt_deassert(struct interrupt *interrupt); |
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62 |
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/* |
/* |
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* alpha_cpu_new(): |
* alpha_cpu_new(): |
117 |
CPU_SETTINGS_ADD_REGISTER64(alpha_regname[i], |
CPU_SETTINGS_ADD_REGISTER64(alpha_regname[i], |
118 |
cpu->cd.alpha.r[i]); |
cpu->cd.alpha.r[i]); |
119 |
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120 |
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/* Register the CPU interrupt pin: */ |
121 |
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{ |
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struct interrupt template; |
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124 |
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memset(&template, 0, sizeof(template)); |
125 |
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template.line = 0; |
126 |
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template.name = cpu->path; |
127 |
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template.extra = cpu; |
128 |
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template.interrupt_assert = alpha_irq_interrupt_assert; |
129 |
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template.interrupt_deassert = alpha_irq_interrupt_deassert; |
130 |
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interrupt_handler_register(&template); |
131 |
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} |
132 |
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return 1; |
return 1; |
134 |
} |
} |
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212 |
} |
} |
213 |
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214 |
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static void add_response_word(struct cpu *cpu, char *r, uint64_t value, |
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size_t maxlen, int len) |
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{ |
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char *format = (len == 4)? "%08"PRIx64 : "%016"PRIx64; |
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if (len == 4) |
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value &= 0xffffffffULL; |
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if (cpu->byte_order == EMUL_LITTLE_ENDIAN) { |
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if (len == 4) { |
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value = ((value & 0xff) << 24) + |
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((value & 0xff00) << 8) + |
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((value & 0xff0000) >> 8) + |
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((value & 0xff000000) >> 24); |
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} else { |
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value = ((value & 0xff) << 56) + |
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((value & 0xff00) << 40) + |
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((value & 0xff0000) << 24) + |
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((value & 0xff000000ULL) << 8) + |
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((value & 0xff00000000ULL) >> 8) + |
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((value & 0xff0000000000ULL) >> 24) + |
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((value & 0xff000000000000ULL) >> 40) + |
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((value & 0xff00000000000000ULL) >> 56); |
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} |
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} |
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snprintf(r + strlen(r), maxlen - strlen(r), format, (uint64_t)value); |
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} |
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215 |
/* |
/* |
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* alpha_cpu_gdb_stub(): |
* alpha_irq_interrupt_assert(): |
217 |
* |
* alpha_irq_interrupt_deassert(): |
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* Execute a "remote GDB" command. Returns a newly allocated response string |
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* on success, NULL on failure. |
|
218 |
*/ |
*/ |
219 |
char *alpha_cpu_gdb_stub(struct cpu *cpu, char *cmd) |
void alpha_irq_interrupt_assert(struct interrupt *interrupt) |
220 |
{ |
{ |
221 |
if (strcmp(cmd, "g") == 0) { |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
222 |
int i; |
cpu->cd.alpha.irq_asserted = 1; |
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char *r; |
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size_t wlen = cpu->is_32bit? |
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sizeof(uint32_t) : sizeof(uint64_t); |
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size_t len = 1 + 76 * wlen; |
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r = malloc(len); |
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if (r == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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r[0] = '\0'; |
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for (i=0; i<128; i++) |
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add_response_word(cpu, r, i, len, wlen); |
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return r; |
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} |
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if (cmd[0] == 'p') { |
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int regnr = strtol(cmd + 1, NULL, 16); |
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size_t wlen = cpu->is_32bit? |
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sizeof(uint32_t) : sizeof(uint64_t); |
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size_t len = 2 * wlen + 1; |
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char *r = malloc(len); |
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r[0] = '\0'; |
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if (regnr >= 0 && regnr <= 31) { |
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add_response_word(cpu, r, |
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cpu->cd.alpha.r[regnr], len, wlen); |
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} else if (regnr >= 32 && regnr <= 62) { |
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add_response_word(cpu, r, |
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cpu->cd.alpha.f[regnr - 32], len, wlen); |
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} else if (regnr == 0x3f) { |
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add_response_word(cpu, r, cpu->cd.alpha.fpcr, |
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len, wlen); |
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} else if (regnr == 0x40) { |
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add_response_word(cpu, r, cpu->pc, len, wlen); |
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} else { |
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/* Unimplemented: */ |
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add_response_word(cpu, r, 0xcc000 + regnr, len, wlen); |
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} |
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return r; |
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} |
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fatal("alpha_cpu_gdb_stub(): TODO\n"); |
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return NULL; |
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223 |
} |
} |
224 |
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void alpha_irq_interrupt_deassert(struct interrupt *interrupt) |
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/* |
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* alpha_cpu_interrupt(): |
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*/ |
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int alpha_cpu_interrupt(struct cpu *cpu, uint64_t irq_nr) |
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{ |
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fatal("alpha_cpu_interrupt(): TODO\n"); |
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return 0; |
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} |
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/* |
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* alpha_cpu_interrupt_ack(): |
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*/ |
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int alpha_cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr) |
|
225 |
{ |
{ |
226 |
/* fatal("alpha_cpu_interrupt_ack(): TODO\n"); */ |
struct cpu *cpu = (struct cpu *) interrupt->extra; |
227 |
return 0; |
cpu->cd.alpha.irq_asserted = 0; |
228 |
} |
} |
229 |
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230 |
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672 |
#define MEMORY_RW alpha_userland_memory_rw |
#define MEMORY_RW alpha_userland_memory_rw |
673 |
#define MEM_ALPHA |
#define MEM_ALPHA |
674 |
#define MEM_USERLAND |
#define MEM_USERLAND |
675 |
#include "../memory_rw.c" |
#include "memory_rw.c" |
676 |
#undef MEM_USERLAND |
#undef MEM_USERLAND |
677 |
#undef MEM_ALPHA |
#undef MEM_ALPHA |
678 |
#undef MEMORY_RW |
#undef MEMORY_RW |